/* register access macros */
#ifndef __BIG_ENDIAN
#ifndef __mips__
-#define R_REG(r) \
- brcmf_sdcard_reg_read(NULL, (unsigned long)(r), sizeof(*(r)))
+#define R_REG(r, typ) \
+ brcmf_sdcard_reg_read(NULL, (r), sizeof(typ))
#else /* __mips__ */
-#define R_REG(r) \
+#define R_REG(r, typ) \
({ \
__typeof(*(r)) __osl_v; \
__asm__ __volatile__("sync"); \
- __osl_v = brcmf_sdcard_reg_read(NULL, (unsigned long)(r),\
- sizeof(*(r))); \
+ __osl_v = brcmf_sdcard_reg_read(NULL, (r),\
+ sizeof(typ)); \
__asm__ __volatile__("sync"); \
__osl_v; \
})
#endif /* __mips__ */
-#define W_REG(r, v) do { \
- brcmf_sdcard_reg_write(NULL, (unsigned long)(r), sizeof(*(r)), \
- (v)); \
+#define W_REG(r, v, typ) do { \
+ brcmf_sdcard_reg_write(NULL, (r), sizeof(typ), (v)); \
} while (0)
#else /* __BIG_ENDIAN */
-#define R_REG(r) \
- brcmf_sdcard_reg_read(NULL, (unsigned long)(r), sizeof(*(r)))
-#define W_REG(r, v) do { \
- brcmf_sdcard_reg_write(NULL, (unsigned long)(r), sizeof(*(r)), \
- (v)); \
+#define R_REG(r, typ) \
+ brcmf_sdcard_reg_read(NULL, (r), sizeof(typ))
+#define W_REG(r, v, typ) do { \
+ brcmf_sdcard_reg_write(NULL, (r), sizeof(typ), (v)); \
} while (0)
#endif /* __BIG_ENDIAN */
-#define AND_REG(r, v) W_REG((r), R_REG(r) & (v))
-#define OR_REG(r, v) W_REG((r), R_REG(r) | (v))
+#define AND_REG(r, v, typ) W_REG((r), R_REG(r, typ) & (v), typ)
+#define OR_REG(r, v, typ) W_REG((r), R_REG(r, typ) | (v), typ)
-#define SET_REG(r, mask, val) \
- W_REG((r), ((R_REG(r) & ~(mask)) | (val)))
+#define SET_REG(r, mask, val, typ) \
+ W_REG((r), ((R_REG(r) & ~(mask)) | (val)), typ)
#ifdef BCMDBG
/* Macros to get register read/write status */
/* NOTE: these assume a local dhdsdio_bus_t *bus! */
-#define R_SDREG(regvar, regaddr, retryvar) \
+#define R_SDREG(regvar, regaddr, retryvar, typ) \
do { \
retryvar = 0; \
do { \
- regvar = R_REG(regaddr); \
+ regvar = R_REG((u32)(regaddr), typ); \
} while (brcmf_sdcard_regfail(bus->card) && \
(++retryvar <= retry_limit)); \
if (retryvar) { \
} \
} while (0)
-#define W_SDREG(regval, regaddr, retryvar) \
+#define W_SDREG(regval, regaddr, retryvar, typ) \
do { \
retryvar = 0; \
do { \
- W_REG(regaddr, regval); \
+ W_REG((u32)(regaddr), regval, typ); \
} while (brcmf_sdcard_regfail(bus->card) && \
(++retryvar <= retry_limit)); \
if (retryvar) { \
if (pendok && ((bus->ci->buscoretype == PCMCIA_CORE_ID)
&& (bus->ci->buscorerev == 9))) {
u32 dummy, retries;
- R_SDREG(dummy, &bus->regs->clockctlstatus, retries);
+ R_SDREG(dummy, &bus->regs->clockctlstatus, retries,
+ u32);
}
/* Check current status */
brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
/* Tell device to start using OOB wakeup */
- W_SDREG(SMB_USE_OOB, ®s->tosbmailbox, retries);
+ W_SDREG(SMB_USE_OOB, ®s->tosbmailbox, retries, u32);
if (retries > retry_limit)
DHD_ERROR(("CANNOT SIGNAL CHIP, WILL NOT WAKE UP!!\n"));
brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
/* Send misc interrupt to indicate OOB not needed */
- W_SDREG(0, ®s->tosbmailboxdata, retries);
+ W_SDREG(0, ®s->tosbmailboxdata, retries, u32);
if (retries <= retry_limit)
- W_SDREG(SMB_DEV_INT, ®s->tosbmailbox, retries);
+ W_SDREG(SMB_DEV_INT, ®s->tosbmailbox, retries, u32);
if (retries > retry_limit)
DHD_ERROR(("CANNOT SIGNAL CHIP TO CLEAR OOB!!\n"));
/* In poll mode, need to check for other events */
if (!bus->intr && cnt) {
/* Check device status, signal pending interrupt */
- R_SDREG(intstatus, ®s->intstatus, retries);
+ R_SDREG(intstatus, ®s->intstatus, retries, u32);
bus->f2txdata++;
if (brcmf_sdcard_regfail(bus->card))
break;
bcmerror = 0;
}
- W_SDREG(0xFFFFFFFF, &bus->regs->intstatus, retries);
+ W_SDREG(0xFFFFFFFF, &bus->regs->intstatus, retries, u32);
brcmf_sdbrcm_chip_resetcore(bus->card, bus->ci->armcorebase);
tasklet_kill(&bus->tasklet);
/* Disable and clear interrupts at the chip level also */
- W_SDREG(0, &bus->regs->hostintmask, retries);
+ W_SDREG(0, &bus->regs->hostintmask, retries, u32);
local_hostintmask = bus->hostintmask;
bus->hostintmask = 0;
SDIO_FUNC_ENABLE_1, NULL);
/* Clear any pending interrupts now that F2 is disabled */
- W_SDREG(local_hostintmask, &bus->regs->intstatus, retries);
+ W_SDREG(local_hostintmask, &bus->regs->intstatus, retries, u32);
/* Turn off the backplane clock (only) */
brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
/* Enable function 2 (frame transfers) */
W_SDREG((SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT),
- &bus->regs->tosbmailboxdata, retries);
+ &bus->regs->tosbmailboxdata, retries, u32);
enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_0, SDIO_CCCR_IOEx, enable,
bus->hostintmask = HOSTINTMASK;
W_SDREG(bus->hostintmask,
(unsigned int *)CORE_BUS_REG(bus->ci->buscorebase,
- hostintmask), retries);
+ hostintmask), retries, u32);
brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, SBSDIO_WATERMARK,
(u8) watermark, &err);
if (rtx) {
bus->rxrtx++;
- W_SDREG(SMB_NAK, ®s->tosbmailbox, retries);
+ W_SDREG(SMB_NAK, ®s->tosbmailbox, retries, u32);
bus->f1regdata++;
if (retries <= retry_limit)
bus->rxskip = true;
DHD_TRACE(("%s: Enter\n", __func__));
/* Read mailbox data and ack that we did so */
- R_SDREG(hmb_data, ®s->tohostmailboxdata, retries);
+ R_SDREG(hmb_data, ®s->tohostmailboxdata, retries, u32);
if (retries <= retry_limit)
- W_SDREG(SMB_INT_ACK, ®s->tosbmailbox, retries);
+ W_SDREG(SMB_INT_ACK, ®s->tosbmailbox, retries, u32);
bus->f1regdata += 2;
/* Dongle recomposed rx frames, accept them again */
/* Pending interrupt indicates new device status */
if (bus->ipend) {
bus->ipend = false;
- R_SDREG(newstatus, ®s->intstatus, retries);
+ R_SDREG(newstatus, ®s->intstatus, retries, u32);
bus->f1regdata++;
if (brcmf_sdcard_regfail(bus->card))
newstatus = 0;
newstatus &= bus->hostintmask;
bus->fcstate = !!(newstatus & I_HMB_FC_STATE);
if (newstatus) {
- W_SDREG(newstatus, ®s->intstatus, retries);
+ W_SDREG(newstatus, ®s->intstatus, retries, u32);
bus->f1regdata++;
}
}
*/
if (intstatus & I_HMB_FC_CHANGE) {
intstatus &= ~I_HMB_FC_CHANGE;
- W_SDREG(I_HMB_FC_CHANGE, ®s->intstatus, retries);
- R_SDREG(newstatus, ®s->intstatus, retries);
+ W_SDREG(I_HMB_FC_CHANGE, ®s->intstatus, retries, u32);
+ R_SDREG(newstatus, ®s->intstatus, retries, u32);
bus->f1regdata += 2;
bus->fcstate =
!!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE));
bus->regs = (void *)bus->ci->buscorebase;
/* Set core control so an SDIO reset does a backplane reset */
- OR_REG(&bus->regs->corecontrol, CC_BPRESEN);
+ OR_REG((u32)&bus->regs->corecontrol, CC_BPRESEN, u32);
brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);