[S390] find bit corner case.
authorMartin Schwidefsky <schwidefsky@de.ibm.com>
Tue, 19 Feb 2008 14:29:28 +0000 (15:29 +0100)
committerMartin Schwidefsky <schwidefsky@de.ibm.com>
Tue, 19 Feb 2008 14:29:33 +0000 (15:29 +0100)
Fix [ext2_]find_first_[zero_]bit for the corner case of an all clear
or all set bit field by always handling that last word of the bit field
with __ffz_word/__ffs_word.

Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
include/asm-s390/bitops.h

index ab83c844d04c106ad216f2c4c2d78243e470e5cb..965394e69452daf2cf856a5a54472cbb7f1ab8e4 100644 (file)
@@ -456,16 +456,18 @@ static inline unsigned long __ffz_word_loop(const unsigned long *addr,
 
        asm volatile(
 #ifndef __s390x__
-               "       ahi     %1,31\n"
-               "       srl     %1,5\n"
+               "       ahi     %1,-1\n"
+               "       sra     %1,5\n"
+               "       jz      1f\n"
                "0:     c       %2,0(%0,%3)\n"
                "       jne     1f\n"
                "       la      %0,4(%0)\n"
                "       brct    %1,0b\n"
                "1:\n"
 #else
-               "       aghi    %1,63\n"
-               "       srlg    %1,%1,6\n"
+               "       aghi    %1,-1\n"
+               "       srag    %1,%1,6\n"
+               "       jz      1f\n"
                "0:     cg      %2,0(%0,%3)\n"
                "       jne     1f\n"
                "       la      %0,8(%0)\n"
@@ -491,16 +493,18 @@ static inline unsigned long __ffs_word_loop(const unsigned long *addr,
 
        asm volatile(
 #ifndef __s390x__
-               "       ahi     %1,31\n"
-               "       srl     %1,5\n"
+               "       ahi     %1,-1\n"
+               "       sra     %1,5\n"
+               "       jz      1f\n"
                "0:     c       %2,0(%0,%3)\n"
                "       jne     1f\n"
                "       la      %0,4(%0)\n"
                "       brct    %1,0b\n"
                "1:\n"
 #else
-               "       aghi    %1,63\n"
-               "       srlg    %1,%1,6\n"
+               "       aghi    %1,-1\n"
+               "       srag    %1,%1,6\n"
+               "       jz      1f\n"
                "0:     cg      %2,0(%0,%3)\n"
                "       jne     1f\n"
                "       la      %0,8(%0)\n"