clk: renesas: r8a7795: Provide FDP1 clocks

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Kieran Bingham <kieran@bingham.xyz>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index e53aff5b23ad4967291def960db7a5331f443362..8f76af6f454d082350dd3bc401a156235cb4a111 100644 (file)
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -107,6 +107,9 @@ static const struct cpg_core_clk r8a7795_core_clks[] __initconst = {
 };
 
 static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = {
+       DEF_MOD("fdp1-2",                117,   R8A7795_CLK_S2D1),
+       DEF_MOD("fdp1-1",                118,   R8A7795_CLK_S2D1),
+       DEF_MOD("fdp1-0",                119,   R8A7795_CLK_S2D1),
        DEF_MOD("scif5",                 202,   R8A7795_CLK_S3D4),
        DEF_MOD("scif4",                 203,   R8A7795_CLK_S3D4),
        DEF_MOD("scif3",                 204,   R8A7795_CLK_S3D4),