drm/i915/guc: Add host2guc notification for suspend and resume
authorAlex Dai <yu.dai@intel.com>
Wed, 30 Sep 2015 16:46:37 +0000 (09:46 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 6 Oct 2015 08:32:22 +0000 (10:32 +0200)
Add host2guc interface to notify GuC power state changes when
enter or resume from power saving state.

v3: Move intel_guc_suspend to i915_drm_suspend for consistency.

v2: Add GuC suspend/resume to runtime suspend/resume too

v1: Change to a more flexible way when fill host to GuC scratch
data in order to remove hard coding.

Signed-off-by: Alex Dai <yu.dai@intel.com>
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/i915_guc_submission.c
drivers/gpu/drm/i915/intel_guc.h
drivers/gpu/drm/i915/intel_guc_fwif.h
drivers/gpu/drm/i915/intel_guc_loader.c

index 1cb6b82e17d4aee25e75159645ceb614f9c5f4f0..760e0ce4aa26941c1ebd8d96706ccdbe3b7d7154 100644 (file)
@@ -638,6 +638,8 @@ static int i915_drm_suspend(struct drm_device *dev)
                return error;
        }
 
+       intel_guc_suspend(dev);
+
        intel_suspend_gt_powersave(dev);
 
        /*
@@ -767,6 +769,8 @@ static int i915_drm_resume(struct drm_device *dev)
        }
        mutex_unlock(&dev->struct_mutex);
 
+       intel_guc_resume(dev);
+
        intel_modeset_init_hw(dev);
 
        spin_lock_irq(&dev_priv->irq_lock);
@@ -1500,6 +1504,8 @@ static int intel_runtime_suspend(struct device *device)
        i915_gem_release_all_mmaps(dev_priv);
        mutex_unlock(&dev->struct_mutex);
 
+       intel_guc_suspend(dev);
+
        intel_suspend_gt_powersave(dev);
        intel_runtime_pm_disable_interrupts(dev_priv);
 
@@ -1559,6 +1565,8 @@ static int intel_runtime_resume(struct device *device)
        intel_opregion_notify_adapter(dev, PCI_D0);
        dev_priv->pm.suspended = false;
 
+       intel_guc_resume(dev);
+
        if (IS_GEN6(dev_priv))
                intel_init_pch_refclk(dev);
 
index 0b1797f52aaf13b7df168d66ed90ae66795b342c..036b42bae827c02049649a9a747d456d462dcaaf 100644 (file)
@@ -923,3 +923,53 @@ void i915_guc_submission_fini(struct drm_device *dev)
        gem_release_guc_obj(guc->ctx_pool_obj);
        guc->ctx_pool_obj = NULL;
 }
+
+/**
+ * intel_guc_suspend() - notify GuC entering suspend state
+ * @dev:       drm device
+ */
+int intel_guc_suspend(struct drm_device *dev)
+{
+       struct drm_i915_private *dev_priv = dev->dev_private;
+       struct intel_guc *guc = &dev_priv->guc;
+       struct intel_context *ctx;
+       u32 data[3];
+
+       if (!i915.enable_guc_submission)
+               return 0;
+
+       ctx = dev_priv->ring[RCS].default_context;
+
+       data[0] = HOST2GUC_ACTION_ENTER_S_STATE;
+       /* any value greater than GUC_POWER_D0 */
+       data[1] = GUC_POWER_D1;
+       /* first page is shared data with GuC */
+       data[2] = i915_gem_obj_ggtt_offset(ctx->engine[RCS].state);
+
+       return host2guc_action(guc, data, ARRAY_SIZE(data));
+}
+
+
+/**
+ * intel_guc_resume() - notify GuC resuming from suspend state
+ * @dev:       drm device
+ */
+int intel_guc_resume(struct drm_device *dev)
+{
+       struct drm_i915_private *dev_priv = dev->dev_private;
+       struct intel_guc *guc = &dev_priv->guc;
+       struct intel_context *ctx;
+       u32 data[3];
+
+       if (!i915.enable_guc_submission)
+               return 0;
+
+       ctx = dev_priv->ring[RCS].default_context;
+
+       data[0] = HOST2GUC_ACTION_EXIT_S_STATE;
+       data[1] = GUC_POWER_D0;
+       /* first page is shared data with GuC */
+       data[2] = i915_gem_obj_ggtt_offset(ctx->engine[RCS].state);
+
+       return host2guc_action(guc, data, ARRAY_SIZE(data));
+}
index 4ec2d27a557ee56735c8a0e32635739c8ccdf3d3..081d5f648d26e827a436f1d11302982da55560db 100644 (file)
@@ -110,6 +110,8 @@ extern void intel_guc_ucode_init(struct drm_device *dev);
 extern int intel_guc_ucode_load(struct drm_device *dev);
 extern void intel_guc_ucode_fini(struct drm_device *dev);
 extern const char *intel_guc_fw_status_repr(enum intel_guc_fw_status status);
+extern int intel_guc_suspend(struct drm_device *dev);
+extern int intel_guc_resume(struct drm_device *dev);
 
 /* i915_guc_submission.c */
 int i915_guc_submission_init(struct drm_device *dev);
index 6c78fdf685e26a7df8b6de9f07338f01717db922..593d2f58597834b789288db6837b0a0197b3f7fd 100644 (file)
@@ -221,12 +221,20 @@ struct guc_context_desc {
 #define GUC_FORCEWAKE_RENDER   (1 << 0)
 #define GUC_FORCEWAKE_MEDIA    (1 << 1)
 
+#define GUC_POWER_UNSPECIFIED  0
+#define GUC_POWER_D0           1
+#define GUC_POWER_D1           2
+#define GUC_POWER_D2           3
+#define GUC_POWER_D3           4
+
 /* This Action will be programmed in C180 - SOFT_SCRATCH_O_REG */
 enum host2guc_action {
        HOST2GUC_ACTION_DEFAULT = 0x0,
        HOST2GUC_ACTION_SAMPLE_FORCEWAKE = 0x6,
        HOST2GUC_ACTION_ALLOCATE_DOORBELL = 0x10,
        HOST2GUC_ACTION_DEALLOCATE_DOORBELL = 0x20,
+       HOST2GUC_ACTION_ENTER_S_STATE = 0x501,
+       HOST2GUC_ACTION_EXIT_S_STATE = 0x502,
        HOST2GUC_ACTION_SLPC_REQUEST = 0x3003,
        HOST2GUC_ACTION_LIMIT
 };
index f87d833aa5ca86ac62528794543779dac4659a66..a17b6a56be83283c990a6f40516c71c8c9e6a61f 100644 (file)
@@ -383,7 +383,6 @@ int intel_guc_ucode_load(struct drm_device *dev)
                intel_guc_fw_status_repr(guc_fw->guc_fw_load_status));
 
        direct_interrupts_to_host(dev_priv);
-       i915_guc_submission_disable(dev);
 
        if (guc_fw->guc_fw_fetch_status == GUC_FIRMWARE_NONE)
                return 0;
@@ -433,6 +432,9 @@ int intel_guc_ucode_load(struct drm_device *dev)
                intel_guc_fw_status_repr(guc_fw->guc_fw_load_status));
 
        if (i915.enable_guc_submission) {
+               /* The execbuf_client will be recreated. Release it first. */
+               i915_guc_submission_disable(dev);
+
                err = i915_guc_submission_enable(dev);
                if (err)
                        goto fail;