arm64: fill flush_all_cpu_caches()

Change-Id: I2b87a88480d04145a341a312aaa8fc9ac0e690aa
Signed-off-by: Park Bumgyu <bumgyu.park@samsung.com>

diff --git a/arch/arm64/include/asm/cacheflush.h b/arch/arm64/include/asm/cacheflush.h
index 7c4a6aac7d6816e7f448297126b1eb74346825d3..5e43e74e5a193c465dd9debf999ed740cfdd8c6d 100644 (file)
--- a/arch/arm64/include/asm/cacheflush.h
+++ b/arch/arm64/include/asm/cacheflush.h
@@ -69,6 +69,7 @@
  *             - kaddr  - page address
  *             - size   - region size
  */
+extern void flush_cache_louis(void);
 extern void flush_cache_all(void);
 extern void flush_icache_range(unsigned long start, unsigned long end);
 extern void __flush_dcache_area(void *addr, size_t len);

diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 20705f5090e2bd43721091a95fff0b7e45d37ce4..a4cfd62153acf61212e73c70262e08c5addf7782 100644 (file)
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -1052,3 +1052,14 @@ bool cpus_are_stuck_in_kernel(void)
 
        return !!cpus_stuck_in_kernel || smp_spin_tables;
 }
+
+static void flush_all_cpu_cache(void *info)
+{
+       flush_cache_louis();
+}
+
+static void flush_all_cluster_cache(void *info)
+{
+       flush_cache_all();
+}
+

diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S
index 0a3221c266ed85ead20c33d08a49acef06eb94b9..06340a5d80c33fff30e43db168094f8548bf1217 100644 (file)
--- a/arch/arm64/mm/cache.S
+++ b/arch/arm64/mm/cache.S
@@ -98,6 +98,26 @@ ENTRY(flush_cache_all)
        ret     x12
 ENDPROC(flush_cache_all)
 
+ENTRY(__flush_dcache_louis)
+        dmb     ish
+        mrs     x0, clidr_el1
+        ands    x3, x0, #(7 << 21)
+        lsr     x3, x3, #20                     // w3 = LoUIS * 2
+        b.eq    level_is_zero
+        mov     x10, #0
+        b       loop1                           // start flushing cache
+level_is_zero:
+        ret
+ENDPROC(__flush_dcache_louis)
+
+ENTRY(flush_cache_louis)
+        mov     x12, lr
+        bl      __flush_dcache_louis
+        mov     x0, #0
+        ic      ialluis
+        ret     x12
+ENDPROC(flush_cache_louis)
+
 /*
  *     flush_icache_range(start,end)
  *