drm/radeon/kms: adjust pll settings for tv
authorAlex Deucher <alexdeucher@gmail.com>
Fri, 9 Apr 2010 19:31:56 +0000 (15:31 -0400)
committerDave Airlie <airlied@redhat.com>
Mon, 19 Apr 2010 03:52:43 +0000 (13:52 +1000)
May fix fdo bug 26582.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/atombios_crtc.c

index fd4ef6d1884968345dcf0debbd70161fc31b3b4a..a87990b3ae8410f3d59ae45145a462addd6872a6 100644 (file)
@@ -521,6 +521,10 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
                                /* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */
                                if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1)
                                        adjusted_clock = mode->clock * 2;
+                               if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) {
+                                       pll->algo = PLL_ALGO_LEGACY;
+                                       pll->flags |= RADEON_PLL_PREFER_CLOSEST_LOWER;
+                               }
                        } else {
                                if (encoder->encoder_type != DRM_MODE_ENCODER_DAC)
                                        pll->flags |= RADEON_PLL_NO_ODD_POST_DIV;