/*
* Issue a "HARD" reset in order for the RISC interrupt
- * bit to be cleared. Schedule a big hammmer to get
+ * bit to be cleared. Schedule a big hammer to get
* out of the RISC PAUSED state.
*/
WRT_REG_WORD(®->hccr, HCCR_RESET_RISC);
/*
* Issue a "HARD" reset in order for the RISC
* interrupt bit to be cleared. Schedule a big
- * hammmer to get out of the RISC PAUSED state.
+ * hammer to get out of the RISC PAUSED state.
*/
WRT_REG_WORD(®->hccr, HCCR_RESET_RISC);
RD_REG_WORD(®->hccr);