drm/amdgpu: send SDMA/GFX IB tests directly to the ring again
authorChristian König <christian.koenig@amd.com>
Mon, 1 Feb 2016 11:02:08 +0000 (12:02 +0100)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 10 Feb 2016 19:17:22 +0000 (14:17 -0500)
There is no point in sending them through the scheduler.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/cik_sdma.c
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

index f352d755968681aa03c29031cf8182d544aadde3..6004dce23dc1ff2b5c0ed3cc2b84bb33a2144c76 100644 (file)
@@ -633,9 +633,7 @@ static int cik_sdma_ring_test_ib(struct amdgpu_ring *ring)
        ib.ptr[3] = 1;
        ib.ptr[4] = 0xDEADBEEF;
        ib.length_dw = 5;
-       r = amdgpu_sched_ib_submit_kernel_helper(adev, ring, &ib, 1, NULL,
-                                                AMDGPU_FENCE_OWNER_UNDEFINED,
-                                                &f);
+       r = amdgpu_ib_schedule(ring, 1, &ib, AMDGPU_FENCE_OWNER_UNDEFINED, &f);
        if (r)
                goto err1;
 
index 5f57a820dacba29288f3e1a91b211f145fdf2dd1..4dac79ac9d3d45fd32320f88ebe09b53901281b9 100644 (file)
@@ -2641,9 +2641,7 @@ static int gfx_v7_0_ring_test_ib(struct amdgpu_ring *ring)
        ib.ptr[2] = 0xDEADBEEF;
        ib.length_dw = 3;
 
-       r = amdgpu_sched_ib_submit_kernel_helper(adev, ring, &ib, 1, NULL,
-                                                AMDGPU_FENCE_OWNER_UNDEFINED,
-                                                &f);
+       r = amdgpu_ib_schedule(ring, 1, &ib, AMDGPU_FENCE_OWNER_UNDEFINED, &f);
        if (r)
                goto err2;
 
index dbfa895c2ae5f1d0e9e0964deb0f7aa54901a19c..4a7708541723755706ec222b6c79ef52b614eb18 100644 (file)
@@ -709,9 +709,7 @@ static int gfx_v8_0_ring_test_ib(struct amdgpu_ring *ring)
        ib.ptr[2] = 0xDEADBEEF;
        ib.length_dw = 3;
 
-       r = amdgpu_sched_ib_submit_kernel_helper(adev, ring, &ib, 1, NULL,
-                                                AMDGPU_FENCE_OWNER_UNDEFINED,
-                                                &f);
+       r = amdgpu_ib_schedule(ring, 1, &ib, AMDGPU_FENCE_OWNER_UNDEFINED, &f);
        if (r)
                goto err2;
 
@@ -1266,9 +1264,7 @@ static int gfx_v8_0_do_edc_gpr_workarounds(struct amdgpu_device *adev)
        ib.ptr[ib.length_dw++] = EVENT_TYPE(7) | EVENT_INDEX(4);
 
        /* shedule the ib on the ring */
-       r = amdgpu_sched_ib_submit_kernel_helper(adev, ring, &ib, 1, NULL,
-                                                AMDGPU_FENCE_OWNER_UNDEFINED,
-                                                &f);
+       r = amdgpu_ib_schedule(ring, 1, &ib, AMDGPU_FENCE_OWNER_UNDEFINED, &f);
        if (r) {
                DRM_ERROR("amdgpu: ib submit failed (%d).\n", r);
                goto fail;
index 49ec93cc71667fa2dee2f53e52a767befb60a154..6a048b0b5fa7bb11db7bf6fafb7b9dbff5277527 100644 (file)
@@ -691,9 +691,7 @@ static int sdma_v2_4_ring_test_ib(struct amdgpu_ring *ring)
        ib.ptr[7] = SDMA_PKT_HEADER_OP(SDMA_OP_NOP);
        ib.length_dw = 8;
 
-       r = amdgpu_sched_ib_submit_kernel_helper(adev, ring, &ib, 1, NULL,
-                                                AMDGPU_FENCE_OWNER_UNDEFINED,
-                                                &f);
+       r = amdgpu_ib_schedule(ring, 1, &ib, AMDGPU_FENCE_OWNER_UNDEFINED, &f);
        if (r)
                goto err1;
 
index 8fe150f0263499380126c5111518477ae472a87a..446aa016e96ee4d572cf2a8f8b3de77ae4a030a8 100644 (file)
@@ -842,9 +842,7 @@ static int sdma_v3_0_ring_test_ib(struct amdgpu_ring *ring)
        ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);
        ib.length_dw = 8;
 
-       r = amdgpu_sched_ib_submit_kernel_helper(adev, ring, &ib, 1, NULL,
-                                                AMDGPU_FENCE_OWNER_UNDEFINED,
-                                                &f);
+       r = amdgpu_ib_schedule(ring, 1, &ib, AMDGPU_FENCE_OWNER_UNDEFINED, &f);
        if (r)
                goto err1;