drm/i915: Add FIXME for bdw semaphore detection in hancheck

Currently not an issue since we don't emit sempahores, but better
not forget about those.

As a little prep work extract the ipehr decoding for cleaner control
flow. And apply a bit of polish.

Cc: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 26f217d63a3c11fbeafe4b37f10f3ff9a28818ac..4be756f422ecd598d44e537f847a5cf923025b6d 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2501,6 +2501,23 @@ ring_idle(struct intel_ring_buffer *ring, u32 seqno)
                i915_seqno_passed(seqno, ring_last_seqno(ring)));
 }
 
+static bool
+ipehr_is_semaphore_wait(struct drm_device *dev, u32 ipehr)
+{
+       if (INTEL_INFO(dev)->gen >= 8) {
+               /*
+                * FIXME: gen8 semaphore support - currently we don't emit
+                * semaphores on bdw anyway, but this needs to be addressed when
+                * we merge that code.
+                */
+               return false;
+       } else {
+               ipehr &= ~MI_SEMAPHORE_SYNC_MASK;
+               return ipehr == (MI_SEMAPHORE_MBOX | MI_SEMAPHORE_COMPARE |
+                                MI_SEMAPHORE_REGISTER);
+       }
+}
+
 static struct intel_ring_buffer *
 semaphore_waits_for(struct intel_ring_buffer *ring, u32 *seqno)
 {
@@ -2509,8 +2526,7 @@ semaphore_waits_for(struct intel_ring_buffer *ring, u32 *seqno)
        int i;
 
        ipehr = I915_READ(RING_IPEHR(ring->mmio_base));
-       if ((ipehr & ~(0x3 << 16)) !=
-           (MI_SEMAPHORE_MBOX | MI_SEMAPHORE_COMPARE | MI_SEMAPHORE_REGISTER))
+       if (!ipehr_is_semaphore_wait(ring->dev, ipehr))
                return NULL;
 
        /*

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 15c27479edbc4097d994305f3cce42fbef0a67ee..085db1b089c17ac62ee0631b645989dfc39f27d7 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -244,7 +244,8 @@
 #define   MI_SEMAPHORE_SYNC_BVE            (0<<16) /* VECS wait for BCS  (VEBSYNC) */
 #define   MI_SEMAPHORE_SYNC_VVE            (1<<16) /* VECS wait for VCS  (VEVSYNC) */
 #define   MI_SEMAPHORE_SYNC_RVE            (2<<16) /* VECS wait for RCS  (VERSYNC) */
-#define   MI_SEMAPHORE_SYNC_INVALID  (3<<16)
+#define   MI_SEMAPHORE_SYNC_INVALID (3<<16)
+#define   MI_SEMAPHORE_SYNC_MASK    (3<<16)
 #define MI_SET_CONTEXT         MI_INSTR(0x18, 0)
 #define   MI_MM_SPACE_GTT              (1<<8)
 #define   MI_MM_SPACE_PHYSICAL         (0<<8)