Merge branch 'for-airlied' of git://people.freedesktop.org/~danvet/drm-intel into...

Daniel writes:
Highlights of this -next round:
- ivb fdi B/C fixes
- hsw sprite/plane offset fixes from Damien
- unified dp/hdmi encoder for hsw, finally external dp support on hsw
  (Paulo)
- kill-agp and some other prep work in the gtt code from Ben
- some fb handling fixes from Ville
- massive pile of patches to align hsw VGA with the spec and make it
  actually work (Paulo)
- pile of workarounds from Jesse, mostly for vlv, but also some other
  related platforms
- start of a dev_priv reorg, that thing grew out of bounds and chaotic
- small bits&pieces all over the place, down to better error handling for
  load-detect on gen2 (Chris, Jani, Mika, Zhenyu, ...)

On top of the previous pile (just copypasta):
- tons of hsw dp prep patches form Paulo
- round scheduled work items and timers to nearest second (Chris)
- some hw workarounds (Jesse&Damien)
- vlv dp support and related fixups (Vijay et al.)
- basic haswell dp support, not yet wired up for external ports (Paulo)
- edp support (Paulo)
- tons of refactorings to prepare for the above (Paulo)
- panel rework, unifiying code between lvds and edp panels (Jani)
- panel fitter scaling modes (Jani + Yuly Novikov)
- panel power improvements, should now work without the BIOS setting it up
- extracting some dp helpers from radeon/i915 and move them to
  drm_dp_helper.c
- randome pile of workarounds (Damien, Ben, ...)
- some cleanups for the register restore code for suspend/resume
- secure batchbuffer support, should enable tear-free blits on gen6+
  Chris)
- random smaller fixlets and cleanups.

* 'for-airlied' of git://people.freedesktop.org/~danvet/drm-intel: (231 commits)
  drm/i915: Restore physical HWS_PGA after resume
  drm/i915: Report amount of usable graphics memory in MiB
  drm/i915/i2c: Track users of GMBUS force-bit
  drm/i915: Allocate the proper size for contexts.
  drm/i915: Update load-detect failure paths for modeset-rework
  drm/i915: Clear unused fields of mode for framebuffer creation
  drm/i915: Always calculate 8xx WM values based on a 32-bpp framebuffer
  drm/i915: Fix sparse warnings in from AGP kill code
  drm/i915: Missed lock change with rps lock
  drm/i915: Move the remaining gtt code
  drm/i915: flush system agent TLBs on SNB
  drm/i915: Kill off now unused gen6+ AGP code
  drm/i915: Calculate correct stolen size for GEN7+
  drm/i915: Stop using AGP layer for GEN6+
  drm/i915: drop the double-OP_STOREDW usage in blt_ring_flush
  drm/i915: don't rewrite the GTT on resume v4
  drm/i915: protect RPS/RC6 related accesses (including PCU) with a new mutex
  drm/i915: put ring frequency and turbo setup into a work queue v5
  drm/i915: don't block resume on fb console resume v2
  drm/i915: extract l3_parity substruct from dev_priv
  ...

diff --cc drivers/gpu/drm/i915/i915_dma.c
index 61ae104dca8c0f5b9938f092b93f7eca70a06525,14396605fd29a2457ca51ae5b269d18c2bd40fe1..a48e4910ea2ca9a0a435d042407db8593ea54ba7
--- 1/drivers/gpu/drm/i915/i915_dma.c
--- 2/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@@ -1491,22 -1470,11 +1470,12 @@@ int i915_driver_load(struct drm_device 
                goto free_priv;
        }
  
-       ret = intel_gmch_probe(dev_priv->bridge_dev, dev->pdev, NULL);
-       if (!ret) {
-               DRM_ERROR("failed to set up gmch\n");
-               ret = -EIO;
+       ret = i915_gem_gtt_init(dev);
+       if (ret)
                goto put_bridge;
-       }
- 
-       dev_priv->mm.gtt = intel_gtt_get();
-       if (!dev_priv->mm.gtt) {
-               DRM_ERROR("Failed to initialize GTT\n");
-               ret = -ENODEV;
-               goto put_gmch;
-       }
  
 -      i915_kick_out_firmware_fb(dev_priv);
 +      if (drm_core_check_feature(dev, DRIVER_MODESET))
 +              i915_kick_out_firmware_fb(dev_priv);
  
        pci_set_master(dev->pdev);
  

diff --cc drivers/gpu/drm/i915/i915_drv.c
Simple merge

diff --cc drivers/gpu/drm/i915/i915_drv.h
Simple merge

diff --cc drivers/gpu/drm/i915/i915_gem.c
Simple merge

diff --cc drivers/gpu/drm/i915/intel_crt.c
index b726b478a4f5db604b6804ad679f7a887168705c,1c97c2761e0ac8a0575ca70a25f79899d177d491..62a5b1154762856b4478e7e42b110e7578cc9e40
--- 1/drivers/gpu/drm/i915/intel_crt.c
--- 2/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@@ -219,9 -219,26 +219,13 @@@ static void intel_crt_mode_set(struct d
                intel_encoder_to_crt(to_intel_encoder(encoder));
        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
        struct drm_i915_private *dev_priv = dev->dev_private;
 -      int dpll_md_reg;
 -      u32 adpa, dpll_md;
 -
 -      dpll_md_reg = DPLL_MD(intel_crtc->pipe);
 -
 -      /*
 -       * Disable separate mode multiplier used when cloning SDVO to CRT
 -       * XXX this needs to be adjusted when we really are cloning
 -       */
 -      if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
 -              dpll_md = I915_READ(dpll_md_reg);
 -              I915_WRITE(dpll_md_reg,
 -                         dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
 -      }
 +      u32 adpa;
  
-       adpa = ADPA_HOTPLUG_BITS;
+       if (HAS_PCH_SPLIT(dev))
+               adpa = ADPA_HOTPLUG_BITS;
+       else
+               adpa = 0;
+ 
        if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
                adpa |= ADPA_HSYNC_ACTIVE_HIGH;
        if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)

diff --cc drivers/gpu/drm/i915/intel_display.c
Simple merge

diff --cc drivers/gpu/drm/i915/intel_dp.c
Simple merge

diff --cc drivers/gpu/drm/i915/intel_lvds.c
Simple merge

diff --cc drivers/gpu/drm/i915/intel_panel.c
Simple merge

diff --cc drivers/gpu/drm/i915/intel_sdvo.c
Simple merge