ARM: imx6ul: add fec bits to GPR syscon definition

FEC requires additional bits to select refrence clock.

Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
index d16f4c82c568f13ad6e025d28951cb8978e4c3e2..558a485d03abdba7695bdfa19b72d4deda689982 100644 (file)
--- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
+++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
@@ -435,4 +435,12 @@
 #define IMX6SX_GPR5_DISP_MUX_DCIC1_LVDS                        (0x1 << 1)
 #define IMX6SX_GPR5_DISP_MUX_DCIC1_MASK                        (0x1 << 1)
 
+/* For imx6ul iomux gpr register field define */
+#define IMX6UL_GPR1_ENET1_CLK_DIR              (0x1 << 17)
+#define IMX6UL_GPR1_ENET2_CLK_DIR              (0x1 << 18)
+#define IMX6UL_GPR1_ENET1_CLK_OUTPUT           (0x1 << 17)
+#define IMX6UL_GPR1_ENET2_CLK_OUTPUT           (0x1 << 18)
+#define IMX6UL_GPR1_ENET_CLK_DIR               (0x3 << 17)
+#define IMX6UL_GPR1_ENET_CLK_OUTPUT            (0x3 << 17)
+
 #endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */