ARM: dts: r8a7794: add CAN nodes to device tree

Add CAN nodes to r8a7794 device tree.

Based on work by Sergei Shtylyov for the r8a7791 SoC.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>

diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 2d8835bdf3f631e4c4007e5b32b5866fd7e91c0d..a1ee2a82c3c0777e05563d5d8aa0de870c6ded49 100644 (file)
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -830,6 +830,28 @@
                };
        };
 
+       can0: can@e6e80000 {
+               compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
+               reg = <0 0xe6e80000 0 0x1000>;
+               interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp9_clks R8A7794_CLK_RCAN0>,
+                        <&cpg_clocks R8A7794_CLK_RCAN>, <&can_clk>;
+               clock-names = "clkp1", "clkp2", "can_clk";
+               power-domains = <&cpg_clocks>;
+               status = "disabled";
+       };
+
+       can1: can@e6e88000 {
+               compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
+               reg = <0 0xe6e88000 0 0x1000>;
+               interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp9_clks R8A7794_CLK_RCAN1>,
+                        <&cpg_clocks R8A7794_CLK_RCAN>, <&can_clk>;
+               clock-names = "clkp1", "clkp2", "can_clk";
+               power-domains = <&cpg_clocks>;
+               status = "disabled";
+       };
+
        clocks {
                #address-cells = <2>;
                #size-cells = <2>;