drm/i915: use the correct register when turning VDD off
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Thu, 31 Oct 2013 14:44:21 +0000 (12:44 -0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 31 Oct 2013 16:28:17 +0000 (17:28 +0100)
That explains why I was seeing 2 consecutive "Turning eDP VDD off"
messages.

Regression introduced by:
    commit bf13e81b904a37d94d83dd6c3b53a147719a3ead
    Author: Jani Nikula <jani.nikula@intel.com>
    Date:   Fri Sep 6 07:40:05 2013 +0300
        drm/i915: add support for per-pipe power sequencing on vlv

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_dp.c

index b91dc7457b4be466943e290cb8e133d923d9260a..68357777e74f8923ff28f02f516d694ee0413896 100644 (file)
@@ -1125,8 +1125,8 @@ static void ironlake_panel_vdd_off_sync(struct intel_dp *intel_dp)
                pp = ironlake_get_pp_control(intel_dp);
                pp &= ~EDP_FORCE_VDD;
 
-               pp_stat_reg = _pp_ctrl_reg(intel_dp);
-               pp_ctrl_reg = _pp_stat_reg(intel_dp);
+               pp_ctrl_reg = _pp_ctrl_reg(intel_dp);
+               pp_stat_reg = _pp_stat_reg(intel_dp);
 
                I915_WRITE(pp_ctrl_reg, pp);
                POSTING_READ(pp_ctrl_reg);