mmc: moxart: fix 4-bit bus width and remove 8-bit bus width

commit 35ca91d1338ae158f6dcc0de5d1e86197924ffda upstream.

According to the datasheet [1] at page 377, 4-bit bus width is turned on by
bit 2 of the Bus Width Register. Thus the current bitmask is wrong: define
BUS_WIDTH_4 BIT(1)

BIT(1) does not work but BIT(2) works. This has been verified on real MOXA
hardware with FTSDC010 controller revision 1_6_0.

The corrected value of BUS_WIDTH_4 mask collides with: define BUS_WIDTH_8
BIT(2). Additionally, 8-bit bus width mode isn't supported according to the
datasheet, so let's remove the corresponding code.

[1]
https://bitbucket.org/Kasreyn/mkrom-uc7112lx/src/master/documents/FIC8120_DS_v1.2.pdf

Fixes: 1b66e94e6b99 ("mmc: moxart: Add MOXA ART SD/MMC driver")
Signed-off-by: Sergei Antonov <saproj@gmail.com>
Cc: Jonas Jensen <jonas.jensen@gmail.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220907205753.1577434-1-saproj@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/mmc/host/moxart-mmc.c b/drivers/mmc/host/moxart-mmc.c
index a5b03fb7656d1670163bd2e5d9639279366c7777..4f8588c3bf537ddfaec3aeb7647200b0c6bf77d4 100644 (file)
--- a/drivers/mmc/host/moxart-mmc.c
+++ b/drivers/mmc/host/moxart-mmc.c
@@ -111,8 +111,8 @@
 #define CLK_DIV_MASK           0x7f
 
 /* REG_BUS_WIDTH */
-#define BUS_WIDTH_8            BIT(2)
-#define BUS_WIDTH_4            BIT(1)
+#define BUS_WIDTH_4_SUPPORT    BIT(3)
+#define BUS_WIDTH_4            BIT(2)
 #define BUS_WIDTH_1            BIT(0)
 
 #define MMC_VDD_360            23
@@ -529,9 +529,6 @@ static void moxart_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
        case MMC_BUS_WIDTH_4:
                writel(BUS_WIDTH_4, host->base + REG_BUS_WIDTH);
                break;
-       case MMC_BUS_WIDTH_8:
-               writel(BUS_WIDTH_8, host->base + REG_BUS_WIDTH);
-               break;
        default:
                writel(BUS_WIDTH_1, host->base + REG_BUS_WIDTH);
                break;
@@ -648,16 +645,8 @@ static int moxart_probe(struct platform_device *pdev)
                dmaengine_slave_config(host->dma_chan_rx, &cfg);
        }
 
-       switch ((readl(host->base + REG_BUS_WIDTH) >> 3) & 3) {
-       case 1:
+       if (readl(host->base + REG_BUS_WIDTH) & BUS_WIDTH_4_SUPPORT)
                mmc->caps |= MMC_CAP_4_BIT_DATA;
-               break;
-       case 2:
-               mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA;
-               break;
-       default:
-               break;
-       }
 
        writel(0, host->base + REG_INTERRUPT_MASK);