static bool force_set_lut;
/*core reg must be set at first time. bit0 is for core2, bit1 is for core3*/
-static bool first_reseted;
+static u32 first_reseted;
module_param(vtotal_add, uint, 0664);
MODULE_PARM_DESC(vtotal_add, "\n vtotal_add\n");
READ_VPP_DV_REG(
DOLBY_CORE1_REG_START
+ 50 + i));
- } else if (is_meson_txlx()) {
+ } else if (is_meson_txlx_stbmode()) {
pr_info("core1 swap\n");
- for (i = DOLBY_TV_SWAP_CTRL0;
- i <= DOLBY_TV_STATUS1; i++)
+ for (i = DOLBY_CORE1_CLKGATE_CTRL;
+ i <= DOLBY_CORE1_DMA_PORT; i++)
pr_info("[0x%4x] = 0x%x\n",
i, READ_VPP_DV_REG(i));
pr_info("core1 real reg\n");
- for (i = DOLBY_TV_REG_START;
+ for (i = DOLBY_CORE1_REG_START;
i <= DOLBY_CORE1_REG_START + 5;
i++)
pr_info("[0x%4x] = 0x%x\n",
bool is_vinfo_available(const struct vinfo_s *vinfo)
{
- return strcmp(vinfo->name, "invalid") &&
- strcmp(vinfo->name, "null") &&
- strcmp(vinfo->name, "576cvbs") &&
- strcmp(vinfo->name, "470cvbs");
+ if (!vinfo)
+ return false;
+ else
+ return strcmp(vinfo->name, "invalid") &&
+ strcmp(vinfo->name, "null") &&
+ strcmp(vinfo->name, "576cvbs") &&
+ strcmp(vinfo->name, "470cvbs");
}
EXPORT_SYMBOL(is_vinfo_available);
int sink_available;
int ret = 0;
- if (is_vinfo_available(vinfo)) {
+ if (vinfo && is_vinfo_available(vinfo)) {
hdr_cap = (1 << 0) |
(sink_support_dolby_vision(vinfo) << 1) |
(sink_support_hdr10_plus(vinfo) << 2) |