struct mfc_dev *dev;
struct itmon_notifier *itmon_info = nb_data;
int is_mfc_itmon = 0, is_master = 0;
+ int is_mmcache_itmon = 0;
dev = container_of(nb, struct mfc_dev, itmon_nb);
strncmp("MFC", itmon_info->dest, sizeof("MFC") - 1) == 0) {
is_mfc_itmon = 1;
is_master = 0;
+ } else if (itmon_info->port &&
+ strncmp("M-CACHE", itmon_info->port, sizeof("M-CACHE") - 1) == 0) {
+ is_mmcache_itmon = 1;
+ is_master = 1;
}
- if (is_mfc_itmon) {
- pr_err("mfc_itmon_notifier: MFC +\n");
- pr_err("MFC is %s\n", is_master ? "master" : "dest");
+ if (is_mfc_itmon || is_mmcache_itmon) {
+ pr_err("mfc_itmon_notifier: %s +\n", is_mfc_itmon ? "MFC" : "MMCACHE");
+ pr_err("%s is %s\n", is_mfc_itmon ? "MFC" : "MMCACHE",
+ is_master ? "master" : "dest");
if (!dev->itmon_notified) {
- pr_err("dump MFC information\n");
+ pr_err("dump MFC %s information\n", is_mmcache_itmon ? "MMCACHE" : "");
+ if (is_mmcache_itmon)
+ mfc_mmcache_dump_info(dev);
if (is_master || (!is_master && itmon_info->onoff))
call_dop(dev, dump_info, dev);
else
} else {
pr_err("MFC notifier has already been called. skip MFC information\n");
}
- pr_err("mfc_itmon_notifier: MFC -\n");
+ pr_err("mfc_itmon_notifier: %s -\n", is_mfc_itmon ? "MFC" : "MMCACHE");
dev->itmon_notified = 1;
}
return NOTIFY_DONE;
mfc_debug_leave();
}
-void __mfc_mmcache_dump_info(struct mfc_dev *dev)
+void mfc_mmcache_dump_info(struct mfc_dev *dev)
{
- pr_err("-----------dumping MMCACHE registers (SFR base = 0x%#lx, dev = 0x%pK)\n",
- (unsigned long)dev->mmcache.base, dev);
- print_hex_dump(KERN_ERR, "[MMCACHE] ", DUMP_PREFIX_ADDRESS, 32, 4, dev->mmcache.base, 0x10, false);
+ if (dev->has_mmcache) {
+ pr_err("-----------dumping MMCACHE registers (SFR base = 0x%#lx)\n", (unsigned long)dev->mmcache.base);
+ print_hex_dump(KERN_ERR, "[MMCACHE] ", DUMP_PREFIX_ADDRESS, 32, 4, dev->mmcache.base, 0x10, false);
+ }
if (dev->has_cmu) {
- pr_err("-----------dumping CMU BUSC registers (SFR base = 0x%#lx, dev = 0x%pK)\n",
- (unsigned long)dev->cmu_busc_base, dev);
+ pr_err("-----------dumping CMU BUSC registers (SFR base = 0x%#lx)\n", (unsigned long)dev->cmu_busc_base);
/* PLL_CON0_MUX_CLKCMU_BUSC_BUS_USER (0x140) */
print_hex_dump(KERN_ERR, "[MMCACHE][BUSC] ", DUMP_PREFIX_ADDRESS, 32, 4, dev->cmu_busc_base + 0x140, 0xc, false);
/* CMU_BUSC (0x60ec) */
/* DBG_NFO_QCH_CON_MMCACHE_QCH (0x7184) */
print_hex_dump(KERN_ERR, "[MMCACHE][BUSC] ", DUMP_PREFIX_ADDRESS, 32, 4, dev->cmu_busc_base + 0x7180, 0x10, false);
- pr_err("-----------dumping CMU MIF0~3 registers (SFR base = 0x%#lx, dev = 0x%pK)\n",
- (unsigned long)dev->cmu_mif0_base, dev);
+ pr_err("-----------dumping CMU MIF0~3 registers (SFR base = 0x%#lx)\n", (unsigned long)dev->cmu_mif0_base);
/* CMU_MIF0 (0x7018 ~ 0x7024) */
print_hex_dump(KERN_ERR, "[MMCACHE][MIF0] ", DUMP_PREFIX_ADDRESS, 32, 4, dev->cmu_mif0_base + 0x7018, 0x10, false);
/* CMU_MIF1 (0x7018 ~ 0x7024) */
ret = exynos_smc(SMC_CMD_MM_CACHE_OPERATION, MMCACHE_GROUP2, 0x0, 0x0);
if (ret != DRMDRV_OK) {
mfc_err_dev("[MMCACHE] Fail to invalidation 0x%x\n", ret);
- __mfc_mmcache_dump_info(dev);
+ mfc_mmcache_dump_info(dev);
call_dop(dev, dump_and_stop_debug_mode, dev);
}
mfc_debug(2, "[MMCACHE] invalidated\n");