-DAP_FIRMWARE=\"atmel/wilc1000_ap_fw.bin\" \
-DP2P_CONCURRENCY_FIRMWARE=\"atmel/wilc1000_p2p_fw.bin\"
-ccflags-y += -I$(src)/ -D__CHECK_ENDIAN__ -DWILC_ASIC_A0 -DWILC_DEBUGFS
+ccflags-y += -I$(src)/ -DWILC_ASIC_A0 -DWILC_DEBUGFS
#ccflags-y += -DTCP_ACK_FILTER
wilc1000-objs := wilc_wfi_cfgoperations.o linux_wlan.o linux_mon.o \
********************************************/
static int sdio_write_reg(struct wilc *wilc, u32 addr, u32 data)
{
-#ifdef BIG_ENDIAN
- data = BYTE_SWAP(data);
-#endif
+ data = cpu_to_le32(data);
if ((addr >= 0xf0) && (addr <= 0xff)) {
sdio_cmd52_t cmd;
}
}
-#ifdef BIG_ENDIAN
- *data = BYTE_SWAP(*data);
-#endif
+ *data = cpu_to_le32(*data);
return 1;
{
int result;
-#ifdef BIG_ENDIAN
- dat = BYTE_SWAP(dat);
-#endif
+ dat = cpu_to_le32(dat);
result = spi_cmd_complete(wilc, CMD_INTERNAL_WRITE, adr, (u8 *)&dat, 4,
0);
if (result != N_OK) {
return 0;
}
-#ifdef BIG_ENDIAN
- *data = BYTE_SWAP(*data);
-#endif
+ *data = cpu_to_le32(*data);
return 1;
}
u8 cmd = CMD_SINGLE_WRITE;
u8 clockless = 0;
-#ifdef BIG_ENDIAN
- data = BYTE_SWAP(data);
-#endif
+ data = cpu_to_le32(data);
if (addr < 0x30) {
/* Clockless register*/
cmd = CMD_INTERNAL_WRITE;
return 0;
}
-#ifdef BIG_ENDIAN
- *data = BYTE_SWAP(*data);
-#endif
+ *data = cpu_to_le32(*data);
return 1;
}
vmm_table[i] |= BIT(10);
PRINT_D(TX_DBG, "VMMTable entry changed for CFG packet = %d\n", vmm_table[i]);
}
-#ifdef BIG_ENDIAN
- vmm_table[i] = BYTE_SWAP(vmm_table[i]);
-#endif
+ vmm_table[i] = cpu_to_le32(vmm_table[i]);
i++;
sum += vmm_sz;
if (tqe && (vmm_table[i] != 0)) {
u32 header, buffer_offset;
-#ifdef BIG_ENDIAN
- vmm_table[i] = BYTE_SWAP(vmm_table[i]);
-#endif
+ vmm_table[i] = cpu_to_le32(vmm_table[i]);
vmm_sz = (vmm_table[i] & 0x3ff);
vmm_sz *= 4;
header = (tqe->type << 31) |
else
header &= ~BIT(30);
-#ifdef BIG_ENDIAN
- header = BYTE_SWAP(header);
-#endif
+ header = cpu_to_le32(header);
memcpy(&txb[offset], &header, 4);
if (tqe->type == WILC_CFG_PKT) {
buffer_offset = ETH_CONFIG_PKT_HDR_OFFSET;
PRINT_D(RX_DBG, "In the 2nd do-while\n");
memcpy(&header, &buffer[offset], 4);
-#ifdef BIG_ENDIAN
- header = BYTE_SWAP(header);
-#endif
+ header = cpu_to_le32(header);
PRINT_D(RX_DBG, "Header = %04x - Offset = %d\n",
header, offset);
do {
memcpy(&addr, &buffer[offset], 4);
memcpy(&size, &buffer[offset + 4], 4);
-#ifdef BIG_ENDIAN
- addr = BYTE_SWAP(addr);
- size = BYTE_SWAP(size);
-#endif
+ addr = cpu_to_le32(addr);
+ size = cpu_to_le32(size);
acquire_bus(wilc, ACQUIRE_ONLY);
offset += 8;
while (((int)size) && (offset < buffer_size)) {
#define ETH_CONFIG_PKT_HDR_OFFSET (ETH_ETHERNET_HDR_OFFSET + \
ETH_CONFIG_PKT_HDR_LEN)
-/********************************************
- *
- * Endian Conversion
- *
- ********************************************/
-
-#define BYTE_SWAP(val) (((val & 0x000000FF) << 24) + \
- ((val & 0x0000FF00) << 8) + \
- ((val & 0x00FF0000) >> 8) + \
- ((val & 0xFF000000) >> 24))
-
/********************************************
*
* Register Defines
while (size > 0) {
i = 0;
wid = info[0] | (info[1] << 8);
-#ifdef BIG_ENDIAN
- wid = BYTE_SWAP(wid);
-#endif
+ wid = cpu_to_le32(wid);
PRINT_INFO(GENERIC_DBG, "Processing response for %d seq %d\n", wid, seq++);
switch ((wid >> 12) & 0x7) {
case WID_CHAR:
break;
if (g_cfg_hword[i].id == wid) {
-#ifdef BIG_ENDIAN
- g_cfg_hword[i].val = (info[3] << 8) | (info[4]);
-#else
- g_cfg_hword[i].val = info[3] | (info[4] << 8);
-#endif
+ g_cfg_hword[i].val = cpu_to_le16(info[3] | (info[4] << 8));
break;
}
i++;
break;
if (g_cfg_word[i].id == wid) {
-#ifdef BIG_ENDIAN
- g_cfg_word[i].val = (info[3] << 24) | (info[4] << 16) | (info[5] << 8) | (info[6]);
-#else
- g_cfg_word[i].val = info[3] | (info[4] << 8) | (info[5] << 16) | (info[6] << 24);
-#endif
+ g_cfg_word[i].val = cpu_to_le32(info[3] | (info[4] << 8) | (info[5] << 16) | (info[6] << 24));
break;
}
i++;