drm/i915: Advertise ppgtt support type in platform definition

Instead of being hidden in sanitize_enable_ppgtt.
It also seems to be the place to do so nowadays.

Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 605247baa7d1afb4762a0ca3aa67420ad6e611d2..88e70fe14cd19823e34f89cbabf5be7d1a891212 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -710,11 +710,14 @@ struct intel_csr {
        func(is_alpha_support); \
        /* Keep has_* in alphabetical order */ \
        func(has_64bit_reloc); \
+       func(has_aliasing_ppgtt); \
        func(has_csr); \
        func(has_ddi); \
        func(has_dp_mst); \
        func(has_fbc); \
        func(has_fpga_dbg); \
+       func(has_full_ppgtt); \
+       func(has_full_48bit_ppgtt); \
        func(has_gmbus_irq); \
        func(has_gmch_display); \
        func(has_guc); \

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 88ddca24afdb92b1880e32d67ed62e8cfb68a5eb..ef00d36680c97f1379437dc207789a60d98a553a 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -113,10 +113,9 @@ int intel_sanitize_enable_ppgtt(struct drm_i915_private *dev_priv,
        bool has_full_ppgtt;
        bool has_full_48bit_ppgtt;
 
-       has_aliasing_ppgtt = INTEL_GEN(dev_priv) >= 6;
-       has_full_ppgtt = INTEL_GEN(dev_priv) >= 7;
-       has_full_48bit_ppgtt =
-               IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9;
+       has_aliasing_ppgtt = dev_priv->info.has_aliasing_ppgtt;
+       has_full_ppgtt = dev_priv->info.has_full_ppgtt;
+       has_full_48bit_ppgtt = dev_priv->info.has_full_48bit_ppgtt;
 
        if (intel_vgpu_active(dev_priv)) {
                /* emulation is too hard */

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 389a33090707a80ed64c8cafdd44e0cbd04e4993..d0b060a1ad7a209256d9a3669d1993b2340371a0 100644 (file)
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -204,6 +204,7 @@ static const struct intel_device_info intel_ironlake_m_info = {
        .has_rc6p = 1, \
        .has_gmbus_irq = 1, \
        .has_hw_contexts = 1, \
+       .has_aliasing_ppgtt = 1, \
        GEN_DEFAULT_PIPEOFFSETS, \
        CURSOR_OFFSETS
 
@@ -226,6 +227,8 @@ static const struct intel_device_info intel_sandybridge_m_info = {
        .has_rc6p = 1, \
        .has_gmbus_irq = 1, \
        .has_hw_contexts = 1, \
+       .has_aliasing_ppgtt = 1, \
+       .has_full_ppgtt = 1, \
        GEN_DEFAULT_PIPEOFFSETS, \
        IVB_CURSOR_OFFSETS
 
@@ -258,6 +261,8 @@ static const struct intel_device_info intel_ivybridge_q_info = {
        .has_hw_contexts = 1, \
        .has_gmch_display = 1, \
        .has_hotplug = 1, \
+       .has_aliasing_ppgtt = 1, \
+       .has_full_ppgtt = 1, \
        .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
        .display_mmio_offset = VLV_DISPLAY_BASE, \
        GEN_DEFAULT_PIPEOFFSETS, \
@@ -289,6 +294,7 @@ static const struct intel_device_info intel_haswell_info = {
        HSW_FEATURES, \
        BDW_COLORS, \
        .has_logical_ring_contexts = 1, \
+       .has_full_48bit_ppgtt = 1, \
        .has_64bit_reloc = 1
 
 static const struct intel_device_info intel_broadwell_info = {
@@ -318,6 +324,8 @@ static const struct intel_device_info intel_cherryview_info = {
        .has_hw_contexts = 1,
        .has_logical_ring_contexts = 1,
        .has_gmch_display = 1,
+       .has_aliasing_ppgtt = 1,
+       .has_full_ppgtt = 1,
        .display_mmio_offset = VLV_DISPLAY_BASE,
        GEN_CHV_PIPEOFFSETS,
        CURSOR_OFFSETS,
@@ -364,6 +372,9 @@ static const struct intel_device_info intel_skylake_gt3_info = {
        .has_logical_ring_contexts = 1, \
        .has_guc = 1, \
        .has_decoupled_mmio = 1, \
+       .has_aliasing_ppgtt = 1, \
+       .has_full_ppgtt = 1, \
+       .has_full_48bit_ppgtt = 1, \
        GEN_DEFAULT_PIPEOFFSETS, \
        IVB_CURSOR_OFFSETS, \
        BDW_COLORS