MIPS: kernel: unaligned: Add EVA instruction wrappers

Use the load/store instruction wrappers from asm/asm.h to
perform such operations when operating in EVA mode.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>

diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index c369a5d355273c49e3d7e35601afa2f86fe4fd70..5ec8f00b51b59580e93cf3cec51e83cea557053b 100644 (file)
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -7,6 +7,7 @@
  *
  * Copyright (C) 1996, 1998, 1999, 2002 by Ralf Baechle
  * Copyright (C) 1999 Silicon Graphics, Inc.
+ * Copyright (C) 2014 Imagination Technologies Ltd.
  *
  * This file contains exception handler for address error exception with the
  * special capability to execute faulting instructions in software.  The
@@ -110,8 +111,8 @@ extern void show_registers(struct pt_regs *regs);
 #ifdef __BIG_ENDIAN
 #define     LoadHW(addr, value, res)  \
                __asm__ __volatile__ (".set\tnoat\n"        \
-                       "1:\tlb\t%0, 0(%2)\n"               \
-                       "2:\tlbu\t$1, 1(%2)\n\t"            \
+                       "1:\t"user_lb("%0", "0(%2)")"\n"    \
+                       "2:\t"user_lbu("$1", "1(%2)")"\n\t" \
                        "sll\t%0, 0x8\n\t"                  \
                        "or\t%0, $1\n\t"                    \
                        "li\t%1, 0\n"                       \
@@ -130,8 +131,8 @@ extern void show_registers(struct pt_regs *regs);
 
 #define     LoadW(addr, value, res)   \
                __asm__ __volatile__ (                      \
-                       "1:\tlwl\t%0, (%2)\n"               \
-                       "2:\tlwr\t%0, 3(%2)\n\t"            \
+                       "1:\t"user_lwl("%0", "(%2)")"\n"    \
+                       "2:\t"user_lwr("%0", "3(%2)")"\n\t" \
                        "li\t%1, 0\n"                       \
                        "3:\n\t"                            \
                        ".insn\n\t"                         \
@@ -149,8 +150,8 @@ extern void show_registers(struct pt_regs *regs);
 #define     LoadHWU(addr, value, res) \
                __asm__ __volatile__ (                      \
                        ".set\tnoat\n"                      \
-                       "1:\tlbu\t%0, 0(%2)\n"              \
-                       "2:\tlbu\t$1, 1(%2)\n\t"            \
+                       "1:\t"user_lbu("%0", "0(%2)")"\n"   \
+                       "2:\t"user_lbu("$1", "1(%2)")"\n\t" \
                        "sll\t%0, 0x8\n\t"                  \
                        "or\t%0, $1\n\t"                    \
                        "li\t%1, 0\n"                       \
@@ -170,8 +171,8 @@ extern void show_registers(struct pt_regs *regs);
 
 #define     LoadWU(addr, value, res)  \
                __asm__ __volatile__ (                      \
-                       "1:\tlwl\t%0, (%2)\n"               \
-                       "2:\tlwr\t%0, 3(%2)\n\t"            \
+                       "1:\t"user_lwl("%0", "(%2)")"\n"    \
+                       "2:\t"user_lwr("%0", "3(%2)")"\n\t" \
                        "dsll\t%0, %0, 32\n\t"              \
                        "dsrl\t%0, %0, 32\n\t"              \
                        "li\t%1, 0\n"                       \
@@ -209,9 +210,9 @@ extern void show_registers(struct pt_regs *regs);
 #define     StoreHW(addr, value, res) \
                __asm__ __volatile__ (                      \
                        ".set\tnoat\n"                      \
-                       "1:\tsb\t%1, 1(%2)\n\t"             \
+                       "1:\t"user_sb("%1", "1(%2)")"\n"    \
                        "srl\t$1, %1, 0x8\n"                \
-                       "2:\tsb\t$1, 0(%2)\n\t"             \
+                       "2:\t"user_sb("$1", "0(%2)")"\n"    \
                        ".set\tat\n\t"                      \
                        "li\t%0, 0\n"                       \
                        "3:\n\t"                            \
@@ -229,8 +230,8 @@ extern void show_registers(struct pt_regs *regs);
 
 #define     StoreW(addr, value, res)  \
                __asm__ __volatile__ (                      \
-                       "1:\tswl\t%1,(%2)\n"                \
-                       "2:\tswr\t%1, 3(%2)\n\t"            \
+                       "1:\t"user_swl("%1", "(%2)")"\n"    \
+                       "2:\t"user_swr("%1", "3(%2)")"\n\t" \
                        "li\t%0, 0\n"                       \
                        "3:\n\t"                            \
                        ".insn\n\t"                         \
@@ -267,8 +268,8 @@ extern void show_registers(struct pt_regs *regs);
 #ifdef __LITTLE_ENDIAN
 #define     LoadHW(addr, value, res)  \
                __asm__ __volatile__ (".set\tnoat\n"        \
-                       "1:\tlb\t%0, 1(%2)\n"               \
-                       "2:\tlbu\t$1, 0(%2)\n\t"            \
+                       "1:\t"user_lb("%0", "1(%2)")"\n"    \
+                       "2:\t"user_lbu("$1", "0(%2)")"\n\t" \
                        "sll\t%0, 0x8\n\t"                  \
                        "or\t%0, $1\n\t"                    \
                        "li\t%1, 0\n"                       \
@@ -287,8 +288,8 @@ extern void show_registers(struct pt_regs *regs);
 
 #define     LoadW(addr, value, res)   \
                __asm__ __volatile__ (                      \
-                       "1:\tlwl\t%0, 3(%2)\n"              \
-                       "2:\tlwr\t%0, (%2)\n\t"             \
+                       "1:\t"user_lwl("%0", "3(%2)")"\n"   \
+                       "2:\t"user_lwr("%0", "(%2)")"\n\t"  \
                        "li\t%1, 0\n"                       \
                        "3:\n\t"                            \
                        ".insn\n\t"                         \
@@ -306,8 +307,8 @@ extern void show_registers(struct pt_regs *regs);
 #define     LoadHWU(addr, value, res) \
                __asm__ __volatile__ (                      \
                        ".set\tnoat\n"                      \
-                       "1:\tlbu\t%0, 1(%2)\n"              \
-                       "2:\tlbu\t$1, 0(%2)\n\t"            \
+                       "1:\t"user_lbu("%0", "1(%2)")"\n"   \
+                       "2:\t"user_lbu("$1", "0(%2)")"\n\t" \
                        "sll\t%0, 0x8\n\t"                  \
                        "or\t%0, $1\n\t"                    \
                        "li\t%1, 0\n"                       \
@@ -327,8 +328,8 @@ extern void show_registers(struct pt_regs *regs);
 
 #define     LoadWU(addr, value, res)  \
                __asm__ __volatile__ (                      \
-                       "1:\tlwl\t%0, 3(%2)\n"              \
-                       "2:\tlwr\t%0, (%2)\n\t"             \
+                       "1:\t"user_lwl("%0", "3(%2)")"\n"   \
+                       "2:\t"user_lwr("%0", "(%2)")"\n\t"  \
                        "dsll\t%0, %0, 32\n\t"              \
                        "dsrl\t%0, %0, 32\n\t"              \
                        "li\t%1, 0\n"                       \
@@ -366,9 +367,9 @@ extern void show_registers(struct pt_regs *regs);
 #define     StoreHW(addr, value, res) \
                __asm__ __volatile__ (                      \
                        ".set\tnoat\n"                      \
-                       "1:\tsb\t%1, 0(%2)\n\t"             \
+                       "1:\t"user_sb("%1", "0(%2)")"\n"    \
                        "srl\t$1,%1, 0x8\n"                 \
-                       "2:\tsb\t$1, 1(%2)\n\t"             \
+                       "2:\t"user_sb("$1", "1(%2)")"\n"    \
                        ".set\tat\n\t"                      \
                        "li\t%0, 0\n"                       \
                        "3:\n\t"                            \
@@ -386,8 +387,8 @@ extern void show_registers(struct pt_regs *regs);
 
 #define     StoreW(addr, value, res)  \
                __asm__ __volatile__ (                      \
-                       "1:\tswl\t%1, 3(%2)\n"              \
-                       "2:\tswr\t%1, (%2)\n\t"             \
+                       "1:\t"user_swl("%1", "3(%2)")"\n"   \
+                       "2:\t"user_swr("%1", "(%2)")"\n\t"  \
                        "li\t%0, 0\n"                       \
                        "3:\n\t"                            \
                        ".insn\n\t"                         \