struct phy *phy;
bool uart_enabled;
struct reset_control *reset;
+ struct regulator *vbus;
};
static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy,
struct rockchip_usb_phy,
clk480m_hw);
+ if (phy->vbus)
+ regulator_disable(phy->vbus);
+
/* Power down usb phy analog blocks by set siddq 1 */
rockchip_usb_phy_power(phy, 1);
}
if (phy->uart_enabled)
return -EBUSY;
+ if (phy->vbus) {
+ int ret;
+
+ ret = regulator_enable(phy->vbus);
+ if (ret)
+ return ret;
+ }
+
return clk_prepare_enable(phy->clk480m);
}
}
phy_set_drvdata(rk_phy->phy, rk_phy);
+ rk_phy->vbus = devm_regulator_get_optional(&rk_phy->phy->dev, "vbus");
+ if (IS_ERR(rk_phy->vbus)) {
+ if (PTR_ERR(rk_phy->vbus) == -EPROBE_DEFER)
+ return PTR_ERR(rk_phy->vbus);
+ rk_phy->vbus = NULL;
+ }
+
/*
* When acting as uart-pipe, just keep clock on otherwise
* only power up usb phy when it use, so disable it when init