PCI: Make PCI_ROM_ADDRESS_MASK a 32-bit constant
authorMatthias Kaehlcke <mka@chromium.org>
Fri, 14 Apr 2017 20:38:02 +0000 (13:38 -0700)
committerivanmeler <i_ivan@windowslive.com>
Wed, 13 Apr 2022 21:13:46 +0000 (21:13 +0000)
commit 76dc52684d0f72971d9f6cc7d5ae198061b715bd upstream.

A 64-bit value is not needed since a PCI ROM address consists in 32 bits.
This fixes a clang warning about "implicit conversion from 'unsigned long'
to 'u32'".

Also remove now unnecessary casts to u32 from __pci_read_base() and
pci_std_update_resource().

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/pci/probe.c
drivers/pci/setup-res.c
include/uapi/linux/pci_regs.h

index 9d96ddc9d8a6963c5410e32278983abcb6633472..85637529bc3a833e0889a2a1a533b8f547eda90f 100644 (file)
@@ -230,7 +230,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
                        res->flags |= IORESOURCE_ROM_ENABLE;
                l64 = l & PCI_ROM_ADDRESS_MASK;
                sz64 = sz & PCI_ROM_ADDRESS_MASK;
-               mask64 = (u32)PCI_ROM_ADDRESS_MASK;
+               mask64 = PCI_ROM_ADDRESS_MASK;
        }
 
        if (res->flags & IORESOURCE_MEM_64) {
index 25062966cbfae49e1f7f1097a67b98b1e00a9ae4..8b2f8b2a574e3dc1226aeaad3ea918a25ff6e527 100644 (file)
@@ -63,7 +63,7 @@ static void pci_std_update_resource(struct pci_dev *dev, int resno)
                mask = (u32)PCI_BASE_ADDRESS_IO_MASK;
                new |= res->flags & ~PCI_BASE_ADDRESS_IO_MASK;
        } else if (resno == PCI_ROM_RESOURCE) {
-               mask = (u32)PCI_ROM_ADDRESS_MASK;
+               mask = PCI_ROM_ADDRESS_MASK;
        } else {
                mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
                new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK;
index 1becea86c73c9d217ef867fac0cce73e075c6427..eb3c786afa70796b79fb8fed150494cf10b47526 100644 (file)
 #define PCI_SUBSYSTEM_ID       0x2e
 #define PCI_ROM_ADDRESS                0x30    /* Bits 31..11 are address, 10..1 reserved */
 #define  PCI_ROM_ADDRESS_ENABLE        0x01
-#define PCI_ROM_ADDRESS_MASK   (~0x7ffUL)
+#define PCI_ROM_ADDRESS_MASK   (~0x7ffU)
 
 #define PCI_CAPABILITY_LIST    0x34    /* Offset of first capability list entry */