/* Macros to access registers */
-/* Set mode for DMA 0 */
-#define RtdDma0Mode(dev, m) \
- writel((m), devpriv->lcfg+LCFG_DMAMODE0)
-
/* Set PCI address for DMA 0 */
#define RtdDma0PciAddr(dev, a) \
writel((a), devpriv->lcfg+LCFG_DMAPADR0)
/* point to first transfer in ring */
devpriv->dma0Offset = 0;
- RtdDma0Mode(dev, DMA_MODE_BITS);
+ writel(DMA_MODE_BITS, devpriv->lcfg + LCFG_DMAMODE0);
RtdDma0Next(dev, /* point to first block */
devpriv->dma0Chain[DMA_CHAIN_COUNT - 1].next);
writel(DMAS_ADFIFO_HALF_FULL, devpriv->las0 + LAS0_DMA0_SRC);
goto rtd_attach_die_error;
}
- RtdDma0Mode(dev, DMA_MODE_BITS);
+ writel(DMA_MODE_BITS, devpriv->lcfg + LCFG_DMAMODE0);
/* set DMA trigger source */
writel(DMAS_ADFIFO_HALF_FULL, devpriv->las0 + LAS0_DMA0_SRC);
} else {