qcom: ipq4019: add DMA nodes to ipq4019 SoC and DK01 device tree
authorMatthew McClintock <mmcclint@codeaurora.org>
Wed, 23 Mar 2016 22:05:12 +0000 (17:05 -0500)
committerAndy Gross <andy.gross@linaro.org>
Wed, 20 Apr 2016 02:42:16 +0000 (21:42 -0500)
This adds the blsp_dma node to the device tree and the required
properties for using DMA with serial

Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
arch/arm/boot/dts/qcom-ipq4019.dtsi

index 2c347ad8faab6ce73c4d4a3e840437846ab35515..b9457dd21a695ddca61268a4262cae05fdd0aa58 100644 (file)
                        };
                };
 
+               blsp_dma: dma@7884000 {
+                       status = "ok";
+               };
+
                spi_0: spi@78b5000 {
                        pinctrl-0 = <&spi_0_pins>;
                        pinctrl-names = "default";
index 3cd42c04421b8aa9d297b0afca2c470cf8d43a56..5c08d19066c21b879dc5408cb790eddf714785a1 100644 (file)
                        interrupts = <0 208 0>;
                };
 
+               blsp_dma: dma@7884000 {
+                       compatible = "qcom,bam-v1.7.0";
+                       reg = <0x07884000 0x23000>;
+                       interrupts = <GIC_SPI 238 IRQ_TYPE_NONE>;
+                       clocks = <&gcc GCC_BLSP1_AHB_CLK>;
+                       clock-names = "bam_clk";
+                       #dma-cells = <1>;
+                       qcom,ee = <0>;
+                       status = "disabled";
+               };
+
                spi_0: spi@78b5000 {
                        compatible = "qcom,spi-qup-v2.2.1";
                        reg = <0x78b5000 0x600>;
                        clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>,
                                <&gcc GCC_BLSP1_AHB_CLK>;
                        clock-names = "core", "iface";
+                       dmas = <&blsp_dma 1>, <&blsp_dma 0>;
+                       dma-names = "rx", "tx";
                };
 
                serial@78b0000 {
                        clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
                                <&gcc GCC_BLSP1_AHB_CLK>;
                        clock-names = "core", "iface";
+                       dmas = <&blsp_dma 3>, <&blsp_dma 2>;
+                       dma-names = "rx", "tx";
                };
 
                watchdog@b017000 {