ARM: ux500: Remove DMA address look-up table

DMA addresses are now passed as part of the dmaengine API by invoking
dmaengine_slave_config(). So there's no requirement for the DMA40
driver to look them up in a table provided by platform data. This
method does not fit in well using Device Tree either.

Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c
index bed25a39e68bd3004c376391e02fe2661db73c8c..e21ffd8c1412afdf2a57ecfb7ba84772e99fa457 100644 (file)
--- a/arch/arm/mach-ux500/devices-db8500.c
+++ b/arch/arm/mach-ux500/devices-db8500.c
@@ -42,87 +42,7 @@ static struct resource dma40_resources[] = {
        }
 };
 
-/*
- * Mapping between destination event lines and physical device address.
- * The event line is tied to a device and therefore the address is constant.
- * When the address comes from a primecell it will be configured in runtime
- * and we set the address to -1 as a placeholder.
- */
-static const dma_addr_t dma40_tx_map[DB8500_DMA_NR_DEV] = {
-       /* MUSB - these will be runtime-reconfigured */
-       [DB8500_DMA_DEV39_USB_OTG_IEP_AND_OEP_8] = -1,
-       [DB8500_DMA_DEV16_USB_OTG_IEP_AND_OEP_7_15] = -1,
-       [DB8500_DMA_DEV17_USB_OTG_IEP_AND_OEP_6_14] = -1,
-       [DB8500_DMA_DEV18_USB_OTG_IEP_AND_OEP_5_13] = -1,
-       [DB8500_DMA_DEV19_USB_OTG_IEP_AND_OEP_4_12] = -1,
-       [DB8500_DMA_DEV36_USB_OTG_IEP_AND_OEP_3_11] = -1,
-       [DB8500_DMA_DEV37_USB_OTG_IEP_AND_OEP_2_10] = -1,
-       [DB8500_DMA_DEV38_USB_OTG_IEP_AND_OEP_1_9] = -1,
-       /* PrimeCells - run-time configured */
-       [DB8500_DMA_DEV0_SPI0] = -1,
-       [DB8500_DMA_DEV1_SD_MMC0] = -1,
-       [DB8500_DMA_DEV2_SD_MMC1] = -1,
-       [DB8500_DMA_DEV3_SD_MMC2] = -1,
-       [DB8500_DMA_DEV8_SSP0] = -1,
-       [DB8500_DMA_DEV9_SSP1] = -1,
-       [DB8500_DMA_DEV11_UART2] = -1,
-       [DB8500_DMA_DEV12_UART1] = -1,
-       [DB8500_DMA_DEV13_UART0] = -1,
-       [DB8500_DMA_DEV28_SD_MM2] = -1,
-       [DB8500_DMA_DEV29_SD_MM0] = -1,
-       [DB8500_DMA_DEV32_SD_MM1] = -1,
-       [DB8500_DMA_DEV33_SPI2] = -1,
-       [DB8500_DMA_DEV35_SPI1] = -1,
-       [DB8500_DMA_DEV40_SPI3] = -1,
-       [DB8500_DMA_DEV41_SD_MM3] = -1,
-       [DB8500_DMA_DEV42_SD_MM4] = -1,
-       [DB8500_DMA_DEV43_SD_MM5] = -1,
-       [DB8500_DMA_DEV14_MSP2] = U8500_MSP2_BASE + MSP_TX_RX_REG_OFFSET,
-       [DB8500_DMA_DEV30_MSP1] = U8500_MSP1_BASE + MSP_TX_RX_REG_OFFSET,
-       [DB8500_DMA_DEV31_MSP0_SLIM0_CH0] = U8500_MSP0_BASE + MSP_TX_RX_REG_OFFSET,
-       [DB8500_DMA_DEV48_CAC1] = U8500_CRYP1_BASE + CRYP1_TX_REG_OFFSET,
-       [DB8500_DMA_DEV50_HAC1_TX] = U8500_HASH1_BASE + HASH1_TX_REG_OFFSET,
-};
-
-/* Mapping between source event lines and physical device address */
-static const dma_addr_t dma40_rx_map[DB8500_DMA_NR_DEV] = {
-       /* MUSB - these will be runtime-reconfigured */
-       [DB8500_DMA_DEV39_USB_OTG_IEP_AND_OEP_8] = -1,
-       [DB8500_DMA_DEV16_USB_OTG_IEP_AND_OEP_7_15] = -1,
-       [DB8500_DMA_DEV17_USB_OTG_IEP_AND_OEP_6_14] = -1,
-       [DB8500_DMA_DEV18_USB_OTG_IEP_AND_OEP_5_13] = -1,
-       [DB8500_DMA_DEV19_USB_OTG_IEP_AND_OEP_4_12] = -1,
-       [DB8500_DMA_DEV36_USB_OTG_IEP_AND_OEP_3_11] = -1,
-       [DB8500_DMA_DEV37_USB_OTG_IEP_AND_OEP_2_10] = -1,
-       [DB8500_DMA_DEV38_USB_OTG_IEP_AND_OEP_1_9] = -1,
-       /* PrimeCells */
-       [DB8500_DMA_DEV0_SPI0] = -1,
-       [DB8500_DMA_DEV1_SD_MMC0] = -1,
-       [DB8500_DMA_DEV2_SD_MMC1] = -1,
-       [DB8500_DMA_DEV3_SD_MMC2] = -1,
-       [DB8500_DMA_DEV8_SSP0] = -1,
-       [DB8500_DMA_DEV9_SSP1] = -1,
-       [DB8500_DMA_DEV11_UART2] = -1,
-       [DB8500_DMA_DEV12_UART1] = -1,
-       [DB8500_DMA_DEV13_UART0] = -1,
-       [DB8500_DMA_DEV28_SD_MM2] = -1,
-       [DB8500_DMA_DEV29_SD_MM0] = -1,
-       [DB8500_DMA_DEV32_SD_MM1] = -1,
-       [DB8500_DMA_DEV33_SPI2] = -1,
-       [DB8500_DMA_DEV35_SPI1] = -1,
-       [DB8500_DMA_DEV40_SPI3] = -1,
-       [DB8500_DMA_DEV41_SD_MM3] = -1,
-       [DB8500_DMA_DEV42_SD_MM4] = -1,
-       [DB8500_DMA_DEV43_SD_MM5] = -1,
-       [DB8500_DMA_DEV14_MSP2] = U8500_MSP2_BASE + MSP_TX_RX_REG_OFFSET,
-       [DB8500_DMA_DEV30_MSP3] = U8500_MSP3_BASE + MSP_TX_RX_REG_OFFSET,
-       [DB8500_DMA_DEV31_MSP0_SLIM0_CH0] = U8500_MSP0_BASE + MSP_TX_RX_REG_OFFSET,
-       [DB8500_DMA_DEV48_CAC1] = U8500_CRYP1_BASE + CRYP1_RX_REG_OFFSET,
-};
-
 struct stedma40_platform_data dma40_plat_data = {
-       .dev_rx = dma40_rx_map,
-       .dev_tx = dma40_tx_map,
        .disabled_channels = {-1},
 };
 

diff --git a/include/linux/platform_data/dma-ste-dma40.h b/include/linux/platform_data/dma-ste-dma40.h
index c54af61c9e48bc938b0076489169842fd6b2e467..af0064e3e13949b15c2034a69a3fc695204ffeda 100644 (file)
--- a/include/linux/platform_data/dma-ste-dma40.h
+++ b/include/linux/platform_data/dma-ste-dma40.h
@@ -152,8 +152,6 @@ struct stedma40_chan_cfg {
  * for 'multiple of 4' channels, like 8.
  */
 struct stedma40_platform_data {
-       const dma_addr_t                *dev_tx;
-       const dma_addr_t                *dev_rx;
        int                              disabled_channels[STEDMA40_MAX_PHYS];
        int                             *soft_lli_chans;
        int                              num_of_soft_lli_chans;