staging: comedi: ni_stc.h: add read/write callbacks to struct ni_private
authorH Hartley Sweeten <hsweeten@visionengravers.com>
Thu, 29 May 2014 17:56:32 +0000 (10:56 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 18 Jun 2014 21:56:45 +0000 (14:56 -0700)
The {read,write}[bwl] macros used to access the registers in the ni_atmio,
ni_mio_cs, and ni_pcimio drivers and the included ni_mio_common.c file all
rely on a local variable having a specific name. They also require some of
the ni_mio_common code to need a __maybe_unused tag on the devpriv local
variable.

Remove all the macros by converting them into private functions and storing
the callbacks in the private data.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/comedi/drivers/ni_atmio.c
drivers/staging/comedi/drivers/ni_mio_common.c
drivers/staging/comedi/drivers/ni_mio_cs.c
drivers/staging/comedi/drivers/ni_pcimio.c
drivers/staging/comedi/drivers/ni_stc.h

index 5b54a49c84b20f495bfbdd71d392ee39b51822d7..ae9ace9ee99b799b04acbd4b59b7dd33eecd68ed 100644 (file)
@@ -272,12 +272,35 @@ static const int ni_irqpin[] = {
 
 /* How we access registers */
 
-#define ni_writel(a, b)                (outl((a), (b)+dev->iobase))
-#define ni_readl(a)            (inl((a)+dev->iobase))
-#define ni_writew(a, b)                (outw((a), (b)+dev->iobase))
-#define ni_readw(a)            (inw((a)+dev->iobase))
-#define ni_writeb(a, b)                (outb((a), (b)+dev->iobase))
-#define ni_readb(a)            (inb((a)+dev->iobase))
+static uint8_t ni_atmio_inb(struct comedi_device *dev, int reg)
+{
+       return inb(dev->iobase + reg);
+}
+
+static uint16_t ni_atmio_inw(struct comedi_device *dev, int reg)
+{
+       return inw(dev->iobase + reg);
+}
+
+static uint32_t ni_atmio_inl(struct comedi_device *dev, int reg)
+{
+       return inl(dev->iobase + reg);
+}
+
+static void ni_atmio_outb(struct comedi_device *dev, uint8_t val, int reg)
+{
+       outb(val, dev->iobase + reg);
+}
+
+static void ni_atmio_outw(struct comedi_device *dev, uint16_t val, int reg)
+{
+       outw(val, dev->iobase + reg);
+}
+
+static void ni_atmio_outl(struct comedi_device *dev, uint32_t val, int reg)
+{
+       outl(val, dev->iobase + reg);
+}
 
 /* How we access windowed registers */
 
@@ -292,10 +315,10 @@ static void ni_atmio_win_out(struct comedi_device *dev, uint16_t data, int addr)
 
        spin_lock_irqsave(&devpriv->window_lock, flags);
        if ((addr) < 8) {
-               ni_writew(data, addr * 2);
+               devpriv->writew(dev, data, addr * 2);
        } else {
-               ni_writew(addr, Window_Address);
-               ni_writew(data, Window_Data);
+               devpriv->writew(dev, addr, Window_Address);
+               devpriv->writew(dev, data, Window_Data);
        }
        spin_unlock_irqrestore(&devpriv->window_lock, flags);
 }
@@ -308,10 +331,10 @@ static uint16_t ni_atmio_win_in(struct comedi_device *dev, int addr)
 
        spin_lock_irqsave(&devpriv->window_lock, flags);
        if (addr < 8) {
-               ret = ni_readw(addr * 2);
+               ret = devpriv->readw(dev, addr * 2);
        } else {
-               ni_writew(addr, Window_Address);
-               ret = ni_readw(Window_Data);
+               devpriv->writew(dev, addr, Window_Address);
+               ret = devpriv->readw(dev, Window_Data);
        }
        spin_unlock_irqrestore(&devpriv->window_lock, flags);
 
@@ -405,10 +428,17 @@ static int ni_atmio_attach(struct comedi_device *dev,
                return ret;
        devpriv = dev->private;
 
-       devpriv->stc_writew = &ni_atmio_win_out;
-       devpriv->stc_readw = &ni_atmio_win_in;
-       devpriv->stc_writel = &win_out2;
-       devpriv->stc_readl = &win_in2;
+       devpriv->readb          = ni_atmio_inb;
+       devpriv->readw          = ni_atmio_inw;
+       devpriv->readl          = ni_atmio_inl;
+       devpriv->writeb         = ni_atmio_outb;
+       devpriv->writew         = ni_atmio_outw;
+       devpriv->writel         = ni_atmio_outl;
+
+       devpriv->stc_writew     = ni_atmio_win_out;
+       devpriv->stc_readw      = ni_atmio_win_in;
+       devpriv->stc_writel     = win_out2;
+       devpriv->stc_readl      = win_in2;
 
        iobase = it->options[0];
        irq = it->options[1];
index 45c42089f690e93f9327d53382215962d84a1805..7632bd6cafc11c897e52736f90defba4921b0aa5 100644 (file)
@@ -275,12 +275,12 @@ static inline void ni_set_bitfield(struct comedi_device *dev, int reg,
        case AI_AO_Select:
                devpriv->ai_ao_select_reg &= ~bit_mask;
                devpriv->ai_ao_select_reg |= bit_values & bit_mask;
-               ni_writeb(devpriv->ai_ao_select_reg, AI_AO_Select);
+               devpriv->writeb(dev, devpriv->ai_ao_select_reg, AI_AO_Select);
                break;
        case G0_G1_Select:
                devpriv->g0_g1_select_reg &= ~bit_mask;
                devpriv->g0_g1_select_reg |= bit_values & bit_mask;
-               ni_writeb(devpriv->g0_g1_select_reg, G0_G1_Select);
+               devpriv->writeb(dev, devpriv->g0_g1_select_reg, G0_G1_Select);
                break;
        default:
                printk("Warning %s() called with invalid register\n", __func__);
@@ -356,7 +356,7 @@ static inline void ni_set_cdo_dma_channel(struct comedi_device *dev,
                    (ni_stc_dma_channel_select_bitfield(mite_channel) <<
                     CDO_DMA_Select_Shift) & CDO_DMA_Select_Mask;
        }
-       ni_writeb(devpriv->cdio_dma_select_reg, M_Offset_CDIO_DMA_Select);
+       devpriv->writeb(dev, devpriv->cdio_dma_select_reg, M_Offset_CDIO_DMA_Select);
        mmiowb();
        spin_unlock_irqrestore(&devpriv->soft_reg_copy_lock, flags);
 }
@@ -572,11 +572,11 @@ static void ni_clear_ai_fifo(struct comedi_device *dev)
 
        if (board->reg_type == ni_reg_6143) {
                /*  Flush the 6143 data FIFO */
-               ni_writel(0x10, AIFIFO_Control_6143);   /*  Flush fifo */
-               ni_writel(0x00, AIFIFO_Control_6143);   /*  Flush fifo */
+               devpriv->writel(dev, 0x10, AIFIFO_Control_6143);
+               devpriv->writel(dev, 0x00, AIFIFO_Control_6143);
                /*  Wait for complete */
                for (i = 0; i < timeout; i++) {
-                       if (!(ni_readl(AIFIFO_Status_6143) & 0x10))
+                       if (!(devpriv->readl(dev, AIFIFO_Status_6143) & 0x10))
                                break;
                        udelay(1);
                }
@@ -586,8 +586,8 @@ static void ni_clear_ai_fifo(struct comedi_device *dev)
        } else {
                devpriv->stc_writew(dev, 1, ADC_FIFO_Clear);
                if (board->reg_type == ni_reg_625x) {
-                       ni_writeb(0, M_Offset_Static_AI_Control(0));
-                       ni_writeb(1, M_Offset_Static_AI_Control(0));
+                       devpriv->writeb(dev, 0, M_Offset_Static_AI_Control(0));
+                       devpriv->writeb(dev, 1, M_Offset_Static_AI_Control(0));
 #if 0
                        /* the NI example code does 3 convert pulses for 625x boards,
                           but that appears to be wrong in practice. */
@@ -628,8 +628,8 @@ static inline void ni_ao_win_outw(struct comedi_device *dev, uint16_t data,
        unsigned long flags;
 
        spin_lock_irqsave(&devpriv->window_lock, flags);
-       ni_writew(addr, AO_Window_Address_611x);
-       ni_writew(data, AO_Window_Data_611x);
+       devpriv->writew(dev, addr, AO_Window_Address_611x);
+       devpriv->writew(dev, data, AO_Window_Data_611x);
        spin_unlock_irqrestore(&devpriv->window_lock, flags);
 }
 
@@ -640,8 +640,8 @@ static inline void ni_ao_win_outl(struct comedi_device *dev, uint32_t data,
        unsigned long flags;
 
        spin_lock_irqsave(&devpriv->window_lock, flags);
-       ni_writew(addr, AO_Window_Address_611x);
-       ni_writel(data, AO_Window_Data_611x);
+       devpriv->writew(dev, addr, AO_Window_Address_611x);
+       devpriv->writel(dev, data, AO_Window_Data_611x);
        spin_unlock_irqrestore(&devpriv->window_lock, flags);
 }
 
@@ -652,8 +652,8 @@ static inline unsigned short ni_ao_win_inw(struct comedi_device *dev, int addr)
        unsigned short data;
 
        spin_lock_irqsave(&devpriv->window_lock, flags);
-       ni_writew(addr, AO_Window_Address_611x);
-       data = ni_readw(AO_Window_Data_611x);
+       devpriv->writew(dev, addr, AO_Window_Address_611x);
+       data = devpriv->readw(dev, AO_Window_Data_611x);
        spin_unlock_irqrestore(&devpriv->window_lock, flags);
        return data;
 }
@@ -770,6 +770,7 @@ static void ni_ao_fifo_load(struct comedi_device *dev,
                            struct comedi_subdevice *s, int n)
 {
        const struct ni_board_struct *board = comedi_board(dev);
+       struct ni_private *devpriv = dev->private;
        struct comedi_async *async = s->async;
        struct comedi_cmd *cmd = &async->cmd;
        int chan;
@@ -798,9 +799,9 @@ static void ni_ao_fifo_load(struct comedi_device *dev,
                                i++;
                                packed_data |= (d << 16) & 0xffff0000;
                        }
-                       ni_writel(packed_data, DAC_FIFO_Data_611x);
+                       devpriv->writel(dev, packed_data, DAC_FIFO_Data_611x);
                } else {
-                       ni_writew(d, DAC_FIFO_Data);
+                       devpriv->writew(dev, d, DAC_FIFO_Data);
                }
                chan++;
                chan %= cmd->chanlist_len;
@@ -888,7 +889,7 @@ static void ni_ai_fifo_read(struct comedi_device *dev,
                u32 dl;
 
                for (i = 0; i < n / 2; i++) {
-                       dl = ni_readl(ADC_FIFO_Data_611x);
+                       dl = devpriv->readl(dev, ADC_FIFO_Data_611x);
                        /* This may get the hi/lo data in the wrong order */
                        data[0] = (dl >> 16) & 0xffff;
                        data[1] = dl & 0xffff;
@@ -896,7 +897,7 @@ static void ni_ai_fifo_read(struct comedi_device *dev,
                }
                /* Check if there's a single sample stuck in the FIFO */
                if (n % 2) {
-                       dl = ni_readl(ADC_FIFO_Data_611x);
+                       dl = devpriv->readl(dev, ADC_FIFO_Data_611x);
                        data[0] = dl & 0xffff;
                        cfc_write_to_buffer(s, data[0]);
                }
@@ -906,7 +907,7 @@ static void ni_ai_fifo_read(struct comedi_device *dev,
 
                /*  This just reads the FIFO assuming the data is present, no checks on the FIFO status are performed */
                for (i = 0; i < n / 2; i++) {
-                       dl = ni_readl(AIFIFO_Data_6143);
+                       dl = devpriv->readl(dev, AIFIFO_Data_6143);
 
                        data[0] = (dl >> 16) & 0xffff;
                        data[1] = dl & 0xffff;
@@ -914,8 +915,9 @@ static void ni_ai_fifo_read(struct comedi_device *dev,
                }
                if (n % 2) {
                        /* Assume there is a single sample stuck in the FIFO */
-                       ni_writel(0x01, AIFIFO_Control_6143);   /*  Get stranded sample into FIFO */
-                       dl = ni_readl(AIFIFO_Data_6143);
+                       /* Get stranded sample into FIFO */
+                       devpriv->writel(dev, 0x01, AIFIFO_Control_6143);
+                       dl = devpriv->readl(dev, AIFIFO_Data_6143);
                        data[0] = (dl >> 16) & 0xffff;
                        cfc_write_to_buffer(s, data[0]);
                }
@@ -928,7 +930,7 @@ static void ni_ai_fifo_read(struct comedi_device *dev,
                }
                for (i = 0; i < n; i++) {
                        devpriv->ai_fifo_buffer[i] =
-                           ni_readw(ADC_FIFO_Data_Register);
+                           devpriv->readw(dev, ADC_FIFO_Data_Register);
                }
                cfc_write_array_to_buffer(s, devpriv->ai_fifo_buffer,
                                          n *
@@ -965,7 +967,7 @@ static void ni_handle_fifo_dregs(struct comedi_device *dev)
                while ((devpriv->stc_readw(dev,
                                           AI_Status_1_Register) &
                        AI_FIFO_Empty_St) == 0) {
-                       dl = ni_readl(ADC_FIFO_Data_611x);
+                       dl = devpriv->readl(dev, ADC_FIFO_Data_611x);
 
                        /* This may get the hi/lo data in the wrong order */
                        data[0] = (dl >> 16);
@@ -974,8 +976,8 @@ static void ni_handle_fifo_dregs(struct comedi_device *dev)
                }
        } else if (board->reg_type == ni_reg_6143) {
                i = 0;
-               while (ni_readl(AIFIFO_Status_6143) & 0x04) {
-                       dl = ni_readl(AIFIFO_Data_6143);
+               while (devpriv->readl(dev, AIFIFO_Status_6143) & 0x04) {
+                       dl = devpriv->readl(dev, AIFIFO_Data_6143);
 
                        /* This may get the hi/lo data in the wrong order */
                        data[0] = (dl >> 16);
@@ -984,9 +986,10 @@ static void ni_handle_fifo_dregs(struct comedi_device *dev)
                        i += 2;
                }
                /*  Check if stranded sample is present */
-               if (ni_readl(AIFIFO_Status_6143) & 0x01) {
-                       ni_writel(0x01, AIFIFO_Control_6143);   /*  Get stranded sample into FIFO */
-                       dl = ni_readl(AIFIFO_Data_6143);
+               if (devpriv->readl(dev, AIFIFO_Status_6143) & 0x01) {
+                       /* Get stranded sample into FIFO */
+                       devpriv->writel(dev, 0x01, AIFIFO_Control_6143);
+                       dl = devpriv->readl(dev, AIFIFO_Data_6143);
                        data[0] = (dl >> 16) & 0xffff;
                        cfc_write_to_buffer(s, data[0]);
                }
@@ -1007,7 +1010,7 @@ static void ni_handle_fifo_dregs(struct comedi_device *dev)
                                if (fifo_empty)
                                        break;
                                devpriv->ai_fifo_buffer[i] =
-                                   ni_readw(ADC_FIFO_Data_Register);
+                                   devpriv->readw(dev, ADC_FIFO_Data_Register);
                        }
                        cfc_write_array_to_buffer(s, devpriv->ai_fifo_buffer,
                                                  i *
@@ -1020,7 +1023,7 @@ static void ni_handle_fifo_dregs(struct comedi_device *dev)
 static void get_last_sample_611x(struct comedi_device *dev)
 {
        const struct ni_board_struct *board = comedi_board(dev);
-       struct ni_private *devpriv __maybe_unused = dev->private;
+       struct ni_private *devpriv = dev->private;
        struct comedi_subdevice *s = dev->read_subdev;
        unsigned short data;
        u32 dl;
@@ -1029,8 +1032,8 @@ static void get_last_sample_611x(struct comedi_device *dev)
                return;
 
        /* Check if there's a single sample stuck in the FIFO */
-       if (ni_readb(XXX_Status) & 0x80) {
-               dl = ni_readl(ADC_FIFO_Data_611x);
+       if (devpriv->readb(dev, XXX_Status) & 0x80) {
+               dl = devpriv->readl(dev, ADC_FIFO_Data_611x);
                data = (dl & 0xffff);
                cfc_write_to_buffer(s, data);
        }
@@ -1039,7 +1042,7 @@ static void get_last_sample_611x(struct comedi_device *dev)
 static void get_last_sample_6143(struct comedi_device *dev)
 {
        const struct ni_board_struct *board = comedi_board(dev);
-       struct ni_private *devpriv __maybe_unused = dev->private;
+       struct ni_private *devpriv = dev->private;
        struct comedi_subdevice *s = dev->read_subdev;
        unsigned short data;
        u32 dl;
@@ -1048,9 +1051,10 @@ static void get_last_sample_6143(struct comedi_device *dev)
                return;
 
        /* Check if there's a single sample stuck in the FIFO */
-       if (ni_readl(AIFIFO_Status_6143) & 0x01) {
-               ni_writel(0x01, AIFIFO_Control_6143);   /*  Get stranded sample into FIFO */
-               dl = ni_readl(AIFIFO_Data_6143);
+       if (devpriv->readl(dev, AIFIFO_Status_6143) & 0x01) {
+               /* Get stranded sample into FIFO */
+               devpriv->writel(dev, 0x01, AIFIFO_Control_6143);
+               dl = devpriv->readl(dev, AIFIFO_Data_6143);
 
                /* This may get the hi/lo data in the wrong order */
                data = (dl >> 16) & 0xffff;
@@ -1416,7 +1420,7 @@ static int ni_ai_reset(struct comedi_device *dev, struct comedi_subdevice *s)
        ni_clear_ai_fifo(dev);
 
        if (board->reg_type != ni_reg_6143)
-               ni_writeb(0, Misc_Command);
+               devpriv->writeb(dev, 0, Misc_Command);
 
        devpriv->stc_writew(dev, AI_Disarm, AI_Command_1_Register);     /* reset pulses */
        devpriv->stc_writew(dev,
@@ -1560,9 +1564,10 @@ static void ni_m_series_load_channelgain_list(struct comedi_device *dev,
                        bypass_bits |= MSeries_AI_Bypass_Dither_Bit;
                /*  don't use 2's complement encoding */
                bypass_bits |= MSeries_AI_Bypass_Polarity_Bit;
-               ni_writel(bypass_bits, M_Offset_AI_Config_FIFO_Bypass);
+               devpriv->writel(dev, bypass_bits,
+                               M_Offset_AI_Config_FIFO_Bypass);
        } else {
-               ni_writel(0, M_Offset_AI_Config_FIFO_Bypass);
+               devpriv->writel(dev, 0, M_Offset_AI_Config_FIFO_Bypass);
        }
        offset = 0;
        for (i = 0; i < n_chan; i++) {
@@ -1600,7 +1605,7 @@ static void ni_m_series_load_channelgain_list(struct comedi_device *dev,
                        config_bits |= MSeries_AI_Config_Dither_Bit;
                /*  don't use 2's complement encoding */
                config_bits |= MSeries_AI_Config_Polarity_Bit;
-               ni_writew(config_bits, M_Offset_AI_Config_FIFO_Data);
+               devpriv->writew(dev, config_bits, M_Offset_AI_Config_FIFO_Data);
        }
        ni_prime_channelgain_list(dev);
 }
@@ -1669,21 +1674,21 @@ static void ni_load_channelgain_list(struct comedi_device *dev,
                if ((list[0] & CR_ALT_SOURCE)
                    && !devpriv->ai_calib_source_enabled) {
                        /*  Strobe Relay enable bit */
-                       ni_writew(devpriv->ai_calib_source |
-                                 Calibration_Channel_6143_RelayOn,
-                                 Calibration_Channel_6143);
-                       ni_writew(devpriv->ai_calib_source,
-                                 Calibration_Channel_6143);
+                       devpriv->writew(dev, devpriv->ai_calib_source |
+                                            Calibration_Channel_6143_RelayOn,
+                                       Calibration_Channel_6143);
+                       devpriv->writew(dev, devpriv->ai_calib_source,
+                                       Calibration_Channel_6143);
                        devpriv->ai_calib_source_enabled = 1;
                        msleep_interruptible(100);      /*  Allow relays to change */
                } else if (!(list[0] & CR_ALT_SOURCE)
                           && devpriv->ai_calib_source_enabled) {
                        /*  Strobe Relay disable bit */
-                       ni_writew(devpriv->ai_calib_source |
-                                 Calibration_Channel_6143_RelayOff,
-                                 Calibration_Channel_6143);
-                       ni_writew(devpriv->ai_calib_source,
-                                 Calibration_Channel_6143);
+                       devpriv->writew(dev, devpriv->ai_calib_source |
+                                            Calibration_Channel_6143_RelayOff,
+                                       Calibration_Channel_6143);
+                       devpriv->writew(dev, devpriv->ai_calib_source,
+                                       Calibration_Channel_6143);
                        devpriv->ai_calib_source_enabled = 0;
                        msleep_interruptible(100);      /*  Allow relays to change */
                }
@@ -1711,8 +1716,8 @@ static void ni_load_channelgain_list(struct comedi_device *dev,
                hi = 0;
                if ((list[i] & CR_ALT_SOURCE)) {
                        if (board->reg_type == ni_reg_611x)
-                               ni_writew(CR_CHAN(list[i]) & 0x0003,
-                                         Calibration_Channel_Select_611x);
+                               devpriv->writew(dev, CR_CHAN(list[i]) & 0x0003,
+                                       Calibration_Channel_Select_611x);
                } else {
                        if (board->reg_type == ni_reg_611x)
                                aref = AREF_DIFF;
@@ -1734,7 +1739,7 @@ static void ni_load_channelgain_list(struct comedi_device *dev,
                }
                hi |= AI_CONFIG_CHANNEL(chan);
 
-               ni_writew(hi, Configuration_Memory_High);
+               devpriv->writew(dev, hi, Configuration_Memory_High);
 
                if (board->reg_type != ni_reg_6143) {
                        lo = range;
@@ -1743,7 +1748,7 @@ static void ni_load_channelgain_list(struct comedi_device *dev,
                        if (dither)
                                lo |= AI_DITHER;
 
-                       ni_writew(lo, Configuration_Memory_Low);
+                       devpriv->writew(dev, lo, Configuration_Memory_Low);
                }
        }
 
@@ -1784,16 +1789,19 @@ static int ni_ai_insn_read(struct comedi_device *dev,
                        /* The 611x has screwy 32-bit FIFOs. */
                        d = 0;
                        for (i = 0; i < NI_TIMEOUT; i++) {
-                               if (ni_readb(XXX_Status) & 0x80) {
-                                       d = (ni_readl(ADC_FIFO_Data_611x) >> 16)
-                                           & 0xffff;
+                               if (devpriv->readb(dev, XXX_Status) & 0x80) {
+                                       d = devpriv->readl(dev,
+                                                          ADC_FIFO_Data_611x);
+                                       d >>= 16;
+                                       d &= 0xffff;
                                        break;
                                }
                                if (!(devpriv->stc_readw(dev,
                                                         AI_Status_1_Register) &
                                      AI_FIFO_Empty_St)) {
-                                       d = ni_readl(ADC_FIFO_Data_611x) &
-                                           0xffff;
+                                       d = devpriv->readl(dev,
+                                                          ADC_FIFO_Data_611x);
+                                       d &= 0xffff;
                                        break;
                                }
                        }
@@ -1813,9 +1821,13 @@ static int ni_ai_insn_read(struct comedi_device *dev,
                        /* The 6143 has 32-bit FIFOs. You need to strobe a bit to move a single 16bit stranded sample into the FIFO */
                        dl = 0;
                        for (i = 0; i < NI_TIMEOUT; i++) {
-                               if (ni_readl(AIFIFO_Status_6143) & 0x01) {
-                                       ni_writel(0x01, AIFIFO_Control_6143);   /*  Get stranded sample into FIFO */
-                                       dl = ni_readl(AIFIFO_Data_6143);
+                               if (devpriv->readl(dev, AIFIFO_Status_6143) &
+                                   0x01) {
+                                       /* Get stranded sample into FIFO */
+                                       devpriv->writel(dev, 0x01,
+                                                       AIFIFO_Control_6143);
+                                       dl = devpriv->readl(dev,
+                                                           AIFIFO_Data_6143);
                                        break;
                                }
                        }
@@ -1842,10 +1854,11 @@ static int ni_ai_insn_read(struct comedi_device *dev,
                                return -ETIME;
                        }
                        if (board->reg_type & ni_reg_m_series_mask) {
-                               data[n] =
-                                   ni_readl(M_Offset_AI_FIFO_Data) & mask;
+                               dl = devpriv->readl(dev, M_Offset_AI_FIFO_Data);
+                               dl &= mask;
+                               data[n] = dl;
                        } else {
-                               d = ni_readw(ADC_FIFO_Data_Register);
+                               d = devpriv->readw(dev, ADC_FIFO_Data_Register);
                                d += signbits;  /* subtle: needs to be short addition */
                                data[n] = d;
                        }
@@ -2500,7 +2513,8 @@ static int ni_ai_insn_config(struct comedi_device *dev,
                                return -EINVAL;
 
                        devpriv->ai_calib_source = calib_source;
-                       ni_writew(calib_source, Calibration_Channel_6143);
+                       devpriv->writew(dev, calib_source,
+                                       Calibration_Channel_6143);
                } else {
                        unsigned int calib_source;
                        unsigned int calib_source_adjust;
@@ -2512,8 +2526,8 @@ static int ni_ai_insn_config(struct comedi_device *dev,
                                return -EINVAL;
                        devpriv->ai_calib_source = calib_source;
                        if (board->reg_type == ni_reg_611x) {
-                               ni_writeb(calib_source_adjust,
-                                         Cal_Gain_Select_611x);
+                               devpriv->writeb(dev, calib_source_adjust,
+                                               Cal_Gain_Select_611x);
                        }
                }
                return 2;
@@ -2566,9 +2580,10 @@ static int ni_m_series_ao_config_chanlist(struct comedi_device *dev,
        if (timed) {
                for (i = 0; i < board->n_aochan; ++i) {
                        devpriv->ao_conf[i] &= ~MSeries_AO_Update_Timed_Bit;
-                       ni_writeb(devpriv->ao_conf[i],
-                                 M_Offset_AO_Config_Bank(i));
-                       ni_writeb(0xf, M_Offset_AO_Waveform_Order(i));
+                       devpriv->writeb(dev, devpriv->ao_conf[i],
+                                       M_Offset_AO_Config_Bank(i));
+                       devpriv->writeb(dev, 0xf,
+                                       M_Offset_AO_Waveform_Order(i));
                }
        }
        for (i = 0; i < n_chans; i++) {
@@ -2581,21 +2596,23 @@ static int ni_m_series_ao_config_chanlist(struct comedi_device *dev,
                switch (krange->max - krange->min) {
                case 20000000:
                        conf |= MSeries_AO_DAC_Reference_10V_Internal_Bits;
-                       ni_writeb(0, M_Offset_AO_Reference_Attenuation(chan));
+                       devpriv->writeb(dev, 0,
+                                       M_Offset_AO_Reference_Attenuation(chan));
                        break;
                case 10000000:
                        conf |= MSeries_AO_DAC_Reference_5V_Internal_Bits;
-                       ni_writeb(0, M_Offset_AO_Reference_Attenuation(chan));
+                       devpriv->writeb(dev, 0,
+                                       M_Offset_AO_Reference_Attenuation(chan));
                        break;
                case 4000000:
                        conf |= MSeries_AO_DAC_Reference_10V_Internal_Bits;
-                       ni_writeb(MSeries_Attenuate_x5_Bit,
-                                 M_Offset_AO_Reference_Attenuation(chan));
+                       devpriv->writeb(dev, MSeries_Attenuate_x5_Bit,
+                                       M_Offset_AO_Reference_Attenuation(chan));
                        break;
                case 2000000:
                        conf |= MSeries_AO_DAC_Reference_5V_Internal_Bits;
-                       ni_writeb(MSeries_Attenuate_x5_Bit,
-                                 M_Offset_AO_Reference_Attenuation(chan));
+                       devpriv->writeb(dev, MSeries_Attenuate_x5_Bit,
+                                       M_Offset_AO_Reference_Attenuation(chan));
                        break;
                default:
                        printk("%s: bug! unhandled ao reference voltage\n",
@@ -2616,9 +2633,9 @@ static int ni_m_series_ao_config_chanlist(struct comedi_device *dev,
                }
                if (timed)
                        conf |= MSeries_AO_Update_Timed_Bit;
-               ni_writeb(conf, M_Offset_AO_Config_Bank(chan));
+               devpriv->writeb(dev, conf, M_Offset_AO_Config_Bank(chan));
                devpriv->ao_conf[chan] = conf;
-               ni_writeb(i, M_Offset_AO_Waveform_Order(chan));
+               devpriv->writeb(dev, i, M_Offset_AO_Waveform_Order(chan));
        }
        return invert;
 }
@@ -2664,7 +2681,7 @@ static int ni_old_ao_config_chanlist(struct comedi_device *dev,
                conf |= (CR_AREF(chanspec[i]) ==
                         AREF_OTHER) ? AO_Ground_Ref : 0;
 
-               ni_writew(conf, AO_Configuration);
+               devpriv->writew(dev, conf, AO_Configuration);
                devpriv->ao_conf[chan] = conf;
        }
        return invert;
@@ -2709,10 +2726,10 @@ static int ni_ao_insn_write(struct comedi_device *dev,
        devpriv->ao[chan] = data[0];
 
        if (board->reg_type & ni_reg_m_series_mask) {
-               ni_writew(data[0], M_Offset_DAC_Direct_Data(chan));
+               devpriv->writew(dev, data[0], M_Offset_DAC_Direct_Data(chan));
        } else
-               ni_writew(data[0] ^ invert,
-                         (chan) ? DAC1_Direct_Data : DAC0_Direct_Data);
+               devpriv->writew(dev, data[0] ^ invert,
+                               (chan) ? DAC1_Direct_Data : DAC0_Direct_Data);
 
        return 1;
 }
@@ -3225,14 +3242,14 @@ static int ni_m_series_dio_insn_config(struct comedi_device *dev,
                                       struct comedi_insn *insn,
                                       unsigned int *data)
 {
-       struct ni_private *devpriv __maybe_unused = dev->private;
+       struct ni_private *devpriv = dev->private;
        int ret;
 
        ret = comedi_dio_insn_config(dev, s, insn, data, 0);
        if (ret)
                return ret;
 
-       ni_writel(s->io_bits, M_Offset_DIO_Direction);
+       devpriv->writel(dev, s->io_bits, M_Offset_DIO_Direction);
 
        return insn->n;
 }
@@ -3242,12 +3259,12 @@ static int ni_m_series_dio_insn_bits(struct comedi_device *dev,
                                     struct comedi_insn *insn,
                                     unsigned int *data)
 {
-       struct ni_private *devpriv __maybe_unused = dev->private;
+       struct ni_private *devpriv = dev->private;
 
        if (comedi_dio_update_state(s, data))
-               ni_writel(s->state, M_Offset_Static_Digital_Output);
+               devpriv->writel(dev, s->state, M_Offset_Static_Digital_Output);
 
-       data[1] = ni_readl(M_Offset_Static_Digital_Input);
+       data[1] = devpriv->readl(dev, M_Offset_Static_Digital_Input);
 
        return insn->n;
 }
@@ -3326,14 +3343,14 @@ static int ni_cdo_inttrig(struct comedi_device *dev,
                          struct comedi_subdevice *s,
                          unsigned int trig_num)
 {
-#ifdef PCIDMA
        struct ni_private *devpriv = dev->private;
-       unsigned long flags;
-#endif
        struct comedi_cmd *cmd = &s->async->cmd;
+       const unsigned timeout = 1000;
        int retval = 0;
        unsigned i;
-       const unsigned timeout = 1000;
+#ifdef PCIDMA
+       unsigned long flags;
+#endif
 
        if (trig_num != cmd->start_arg)
                return -EINVAL;
@@ -3358,11 +3375,12 @@ static int ni_cdo_inttrig(struct comedi_device *dev,
 #endif
 /*
 * XXX not sure what interrupt C group does
-* ni_writeb(Interrupt_Group_C_Enable_Bit,
+* devpriv->writeb(dev, Interrupt_Group_C_Enable_Bit,
 * M_Offset_Interrupt_C_Enable); wait for dma to fill output fifo
 */
        for (i = 0; i < timeout; ++i) {
-               if (ni_readl(M_Offset_CDIO_Status) & CDO_FIFO_Full_Bit)
+               if (devpriv->readl(dev, M_Offset_CDIO_Status) &
+                   CDO_FIFO_Full_Bit)
                        break;
                udelay(10);
        }
@@ -3371,20 +3389,20 @@ static int ni_cdo_inttrig(struct comedi_device *dev,
                s->cancel(dev, s);
                return -EIO;
        }
-       ni_writel(CDO_Arm_Bit | CDO_Error_Interrupt_Enable_Set_Bit |
-                 CDO_Empty_FIFO_Interrupt_Enable_Set_Bit,
-                 M_Offset_CDIO_Command);
+       devpriv->writel(dev, CDO_Arm_Bit | CDO_Error_Interrupt_Enable_Set_Bit |
+                            CDO_Empty_FIFO_Interrupt_Enable_Set_Bit,
+                       M_Offset_CDIO_Command);
        return retval;
 }
 
 static int ni_cdio_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
 {
-       struct ni_private *devpriv __maybe_unused = dev->private;
+       struct ni_private *devpriv = dev->private;
        const struct comedi_cmd *cmd = &s->async->cmd;
        unsigned cdo_mode_bits = CDO_FIFO_Mode_Bit | CDO_Halt_On_Error_Bit;
        int retval;
 
-       ni_writel(CDO_Reset_Bit, M_Offset_CDIO_Command);
+       devpriv->writel(dev, CDO_Reset_Bit, M_Offset_CDIO_Command);
        switch (cmd->scan_begin_src) {
        case TRIG_EXT:
                cdo_mode_bits |=
@@ -3397,11 +3415,11 @@ static int ni_cdio_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
        }
        if (cmd->scan_begin_arg & CR_INVERT)
                cdo_mode_bits |= CDO_Polarity_Bit;
-       ni_writel(cdo_mode_bits, M_Offset_CDO_Mode);
+       devpriv->writel(dev, cdo_mode_bits, M_Offset_CDO_Mode);
        if (s->io_bits) {
-               ni_writel(s->state, M_Offset_CDO_FIFO_Data);
-               ni_writel(CDO_SW_Update_Bit, M_Offset_CDIO_Command);
-               ni_writel(s->io_bits, M_Offset_CDO_Mask_Enable);
+               devpriv->writel(dev, s->state, M_Offset_CDO_FIFO_Data);
+               devpriv->writel(dev, CDO_SW_Update_Bit, M_Offset_CDIO_Command);
+               devpriv->writel(dev, s->io_bits, M_Offset_CDO_Mask_Enable);
        } else {
                comedi_error(dev,
                             "attempted to run digital output command with no lines configured as outputs");
@@ -3418,17 +3436,18 @@ static int ni_cdio_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
 
 static int ni_cdio_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
 {
-       struct ni_private *devpriv __maybe_unused = dev->private;
+       struct ni_private *devpriv = dev->private;
 
-       ni_writel(CDO_Disarm_Bit | CDO_Error_Interrupt_Enable_Clear_Bit |
-                 CDO_Empty_FIFO_Interrupt_Enable_Clear_Bit |
-                 CDO_FIFO_Request_Interrupt_Enable_Clear_Bit,
-                 M_Offset_CDIO_Command);
+       devpriv->writel(dev, CDO_Disarm_Bit |
+                            CDO_Error_Interrupt_Enable_Clear_Bit |
+                            CDO_Empty_FIFO_Interrupt_Enable_Clear_Bit |
+                            CDO_FIFO_Request_Interrupt_Enable_Clear_Bit,
+                       M_Offset_CDIO_Command);
 /*
-* XXX not sure what interrupt C group does ni_writeb(0,
+* XXX not sure what interrupt C group does devpriv->writeb(dev, 0,
 * M_Offset_Interrupt_C_Enable);
 */
-       ni_writel(0, M_Offset_CDO_Mask_Enable);
+       devpriv->writel(dev, 0, M_Offset_CDO_Mask_Enable);
        ni_release_cdo_mite_channel(dev);
        return 0;
 }
@@ -3436,7 +3455,7 @@ static int ni_cdio_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
 static void handle_cdio_interrupt(struct comedi_device *dev)
 {
        const struct ni_board_struct *board = comedi_board(dev);
-       struct ni_private *devpriv __maybe_unused = dev->private;
+       struct ni_private *devpriv = dev->private;
        unsigned cdio_status;
        struct comedi_subdevice *s = &dev->subdevices[NI_DIO_SUBDEV];
 #ifdef PCIDMA
@@ -3460,16 +3479,18 @@ static void handle_cdio_interrupt(struct comedi_device *dev)
        spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
 #endif
 
-       cdio_status = ni_readl(M_Offset_CDIO_Status);
+       cdio_status = devpriv->readl(dev, M_Offset_CDIO_Status);
        if (cdio_status & (CDO_Overrun_Bit | CDO_Underflow_Bit)) {
                /* printk("cdio error: statux=0x%x\n", cdio_status); */
-               ni_writel(CDO_Error_Interrupt_Confirm_Bit, M_Offset_CDIO_Command);      /*  XXX just guessing this is needed and does something useful */
+               /* XXX just guessing this is needed and does something useful */
+               devpriv->writel(dev, CDO_Error_Interrupt_Confirm_Bit,
+                               M_Offset_CDIO_Command);
                s->async->events |= COMEDI_CB_OVERFLOW;
        }
        if (cdio_status & CDO_FIFO_Empty_Bit) {
                /* printk("cdio fifo empty\n"); */
-               ni_writel(CDO_Empty_FIFO_Interrupt_Enable_Clear_Bit,
-                         M_Offset_CDIO_Command);
+               devpriv->writel(dev, CDO_Empty_FIFO_Interrupt_Enable_Clear_Bit,
+                               M_Offset_CDIO_Command);
                /* s->async->events |= COMEDI_CB_EOA; */
        }
        cfc_handle_events(dev, s);
@@ -3786,28 +3807,28 @@ static void ni_gpct_write_register(struct ni_gpct *counter, unsigned bits,
        switch (reg) {
                /* m-series-only registers */
        case NITIO_G0_CNT_MODE:
-               ni_writew(bits, M_Offset_G0_Counting_Mode);
+               devpriv->writew(dev, bits, M_Offset_G0_Counting_Mode);
                break;
        case NITIO_G1_CNT_MODE:
-               ni_writew(bits, M_Offset_G1_Counting_Mode);
+               devpriv->writew(dev, bits, M_Offset_G1_Counting_Mode);
                break;
        case NITIO_G0_GATE2:
-               ni_writew(bits, M_Offset_G0_Second_Gate);
+               devpriv->writew(dev, bits, M_Offset_G0_Second_Gate);
                break;
        case NITIO_G1_GATE2:
-               ni_writew(bits, M_Offset_G1_Second_Gate);
+               devpriv->writew(dev, bits, M_Offset_G1_Second_Gate);
                break;
        case NITIO_G0_DMA_CFG:
-               ni_writew(bits, M_Offset_G0_DMA_Config);
+               devpriv->writew(dev, bits, M_Offset_G0_DMA_Config);
                break;
        case NITIO_G1_DMA_CFG:
-               ni_writew(bits, M_Offset_G1_DMA_Config);
+               devpriv->writew(dev, bits, M_Offset_G1_DMA_Config);
                break;
        case NITIO_G0_ABZ:
-               ni_writew(bits, M_Offset_G0_MSeries_ABZ);
+               devpriv->writew(dev, bits, M_Offset_G0_MSeries_ABZ);
                break;
        case NITIO_G1_ABZ:
-               ni_writew(bits, M_Offset_G1_MSeries_ABZ);
+               devpriv->writew(dev, bits, M_Offset_G1_MSeries_ABZ);
                break;
 
                /* 32 bit registers */
@@ -3849,9 +3870,9 @@ static unsigned ni_gpct_read_register(struct ni_gpct *counter,
        switch (reg) {
                /* m-series only registers */
        case NITIO_G0_DMA_STATUS:
-               return ni_readw(M_Offset_G0_DMA_Status);
+               return devpriv->readw(dev, M_Offset_G0_DMA_Status);
        case NITIO_G1_DMA_STATUS:
-               return ni_readw(M_Offset_G1_DMA_Status);
+               return devpriv->readw(dev, M_Offset_G1_DMA_Status);
 
                /* 32 bit registers */
        case NITIO_G0_HW_SAVE:
@@ -3948,13 +3969,13 @@ static int ni_freq_out_insn_config(struct comedi_device *dev,
 static int ni_8255_callback(int dir, int port, int data, unsigned long arg)
 {
        struct comedi_device *dev = (struct comedi_device *)arg;
-       struct ni_private *devpriv __maybe_unused = dev->private;
+       struct ni_private *devpriv = dev->private;
 
        if (dir) {
-               ni_writeb(data, Port_A + 2 * port);
+               devpriv->writeb(dev, data, Port_A + 2 * port);
                return 0;
        } else {
-               return ni_readb(Port_A + 2 * port);
+               return devpriv->readb(dev, Port_A + 2 * port);
        }
 }
 
@@ -4019,9 +4040,9 @@ static int ni_m_series_pwm_config(struct comedi_device *dev,
                        data[4] = down_count * devpriv->clock_ns;
                        return -EAGAIN;
                }
-               ni_writel(MSeries_Cal_PWM_High_Time_Bits(up_count) |
-                         MSeries_Cal_PWM_Low_Time_Bits(down_count),
-                         M_Offset_Cal_PWM);
+               devpriv->writel(dev, MSeries_Cal_PWM_High_Time_Bits(up_count) |
+                                    MSeries_Cal_PWM_Low_Time_Bits(down_count),
+                               M_Offset_Cal_PWM);
                devpriv->pwm_up_count = up_count;
                devpriv->pwm_down_count = down_count;
                return 5;
@@ -4088,9 +4109,9 @@ static int ni_6143_pwm_config(struct comedi_device *dev,
                        data[4] = down_count * devpriv->clock_ns;
                        return -EAGAIN;
                }
-               ni_writel(up_count, Calibration_HighTime_6143);
+               devpriv->writel(dev, up_count, Calibration_HighTime_6143);
                devpriv->pwm_up_count = up_count;
-               ni_writel(down_count, Calibration_LowTime_6143);
+               devpriv->writel(dev, down_count, Calibration_LowTime_6143);
                devpriv->pwm_down_count = down_count;
                return 5;
                break;
@@ -4194,14 +4215,16 @@ static void ni_write_caldac(struct comedi_device *dev, int addr, int val)
        }
 
        for (bit = 1 << (bits - 1); bit; bit >>= 1) {
-               ni_writeb(((bit & bitstring) ? 0x02 : 0), Serial_Command);
+               devpriv->writeb(dev, ((bit & bitstring) ? 0x02 : 0),
+                               Serial_Command);
                udelay(1);
-               ni_writeb(1 | ((bit & bitstring) ? 0x02 : 0), Serial_Command);
+               devpriv->writeb(dev, 1 | ((bit & bitstring) ? 0x02 : 0),
+                               Serial_Command);
                udelay(1);
        }
-       ni_writeb(loadbit, Serial_Command);
+       devpriv->writeb(dev, loadbit, Serial_Command);
        udelay(1);
-       ni_writeb(0, Serial_Command);
+       devpriv->writeb(dev, 0, Serial_Command);
 }
 
 static int ni_calib_insn_write(struct comedi_device *dev,
@@ -4282,25 +4305,26 @@ static void caldac_setup(struct comedi_device *dev, struct comedi_subdevice *s)
 
 static int ni_read_eeprom(struct comedi_device *dev, int addr)
 {
-       struct ni_private *devpriv __maybe_unused = dev->private;
+       struct ni_private *devpriv = dev->private;
        int bit;
        int bitstring;
 
        bitstring = 0x0300 | ((addr & 0x100) << 3) | (addr & 0xff);
-       ni_writeb(0x04, Serial_Command);
+       devpriv->writeb(dev, 0x04, Serial_Command);
        for (bit = 0x8000; bit; bit >>= 1) {
-               ni_writeb(0x04 | ((bit & bitstring) ? 0x02 : 0),
-                         Serial_Command);
-               ni_writeb(0x05 | ((bit & bitstring) ? 0x02 : 0),
-                         Serial_Command);
+               devpriv->writeb(dev, 0x04 | ((bit & bitstring) ? 0x02 : 0),
+                               Serial_Command);
+               devpriv->writeb(dev, 0x05 | ((bit & bitstring) ? 0x02 : 0),
+                               Serial_Command);
        }
        bitstring = 0;
        for (bit = 0x80; bit; bit >>= 1) {
-               ni_writeb(0x04, Serial_Command);
-               ni_writeb(0x05, Serial_Command);
-               bitstring |= ((ni_readb(XXX_Status) & PROMOUT) ? bit : 0);
+               devpriv->writeb(dev, 0x04, Serial_Command);
+               devpriv->writeb(dev, 0x05, Serial_Command);
+               bitstring |= ((devpriv->readb(dev, XXX_Status) & PROMOUT)
+                               ? bit : 0);
        }
-       ni_writeb(0x00, Serial_Command);
+       devpriv->writeb(dev, 0x00, Serial_Command);
 
        return bitstring;
 }
@@ -4403,8 +4427,8 @@ static int ni_m_series_set_pfi_routing(struct comedi_device *dev,
            ~MSeries_PFI_Output_Select_Mask(chan);
        devpriv->pfi_output_select_reg[array_offset] |=
            MSeries_PFI_Output_Select_Bits(chan, source);
-       ni_writew(devpriv->pfi_output_select_reg[array_offset],
-                 M_Offset_PFI_Output_Select(pfi_reg_index));
+       devpriv->writew(dev, devpriv->pfi_output_select_reg[array_offset],
+                       M_Offset_PFI_Output_Select(pfi_reg_index));
        return 2;
 }
 
@@ -4434,15 +4458,15 @@ static int ni_config_filter(struct comedi_device *dev,
                            enum ni_pfi_filter_select filter)
 {
        const struct ni_board_struct *board = comedi_board(dev);
-       struct ni_private *devpriv __maybe_unused = dev->private;
+       struct ni_private *devpriv = dev->private;
        unsigned bits;
 
        if ((board->reg_type & ni_reg_m_series_mask) == 0)
                return -ENOTSUPP;
-       bits = ni_readl(M_Offset_PFI_Filter);
+       bits = devpriv->readl(dev, M_Offset_PFI_Filter);
        bits &= ~MSeries_PFI_Filter_Select_Mask(pfi_channel);
        bits |= MSeries_PFI_Filter_Select_Bits(pfi_channel, filter);
-       ni_writel(bits, M_Offset_PFI_Filter);
+       devpriv->writel(dev, bits, M_Offset_PFI_Filter);
        return 0;
 }
 
@@ -4493,15 +4517,15 @@ static int ni_pfi_insn_bits(struct comedi_device *dev,
                            unsigned int *data)
 {
        const struct ni_board_struct *board = comedi_board(dev);
-       struct ni_private *devpriv __maybe_unused = dev->private;
+       struct ni_private *devpriv = dev->private;
 
        if (!(board->reg_type & ni_reg_m_series_mask))
                return -ENOTSUPP;
 
        if (comedi_dio_update_state(s, data))
-               ni_writew(s->state, M_Offset_PFI_DO);
+               devpriv->writew(dev, s->state, M_Offset_PFI_DO);
 
-       data[1] = ni_readw(M_Offset_PFI_DI);
+       data[1] = devpriv->readw(dev, M_Offset_PFI_DI);
 
        return insn->n;
 }
@@ -4766,7 +4790,8 @@ static int ni_mseries_set_pll_master_clock(struct comedi_device *dev,
                }
                break;
        }
-       ni_writew(devpriv->clock_and_fout2, M_Offset_Clock_and_Fout2);
+       devpriv->writew(dev, devpriv->clock_and_fout2,
+                       M_Offset_Clock_and_Fout2);
        pll_control_bits |=
            MSeries_PLL_Divisor_Bits(freq_divider) |
            MSeries_PLL_Multiplier_Bits(freq_multiplier);
@@ -4774,11 +4799,12 @@ static int ni_mseries_set_pll_master_clock(struct comedi_device *dev,
        /* printk("using divider=%i, multiplier=%i for PLL. pll_control_bits = 0x%x\n",
         * freq_divider, freq_multiplier, pll_control_bits); */
        /* printk("clock_ns=%d\n", devpriv->clock_ns); */
-       ni_writew(pll_control_bits, M_Offset_PLL_Control);
+       devpriv->writew(dev, pll_control_bits, M_Offset_PLL_Control);
        devpriv->clock_source = source;
        /* it seems to typically take a few hundred microseconds for PLL to lock */
        for (i = 0; i < timeout; ++i) {
-               if (ni_readw(M_Offset_PLL_Status) & MSeries_PLL_Locked_Bit)
+               if (devpriv->readw(dev, M_Offset_PLL_Status) &
+                   MSeries_PLL_Locked_Bit)
                        break;
                udelay(1);
        }
@@ -4806,9 +4832,9 @@ static int ni_set_master_clock(struct comedi_device *dev,
                        devpriv->clock_and_fout2 &=
                            ~(MSeries_Timebase1_Select_Bit |
                              MSeries_Timebase3_Select_Bit);
-                       ni_writew(devpriv->clock_and_fout2,
-                                 M_Offset_Clock_and_Fout2);
-                       ni_writew(0, M_Offset_PLL_Control);
+                       devpriv->writew(dev, devpriv->clock_and_fout2,
+                                       M_Offset_Clock_and_Fout2);
+                       devpriv->writew(dev, 0, M_Offset_PLL_Control);
                }
                devpriv->clock_source = source;
        } else {
@@ -5355,13 +5381,15 @@ static int ni_E_init(struct comedi_device *dev)
                s->async_dma_dir = DMA_BIDIRECTIONAL;
                s->len_chanlist = s->n_chan;
 
-               ni_writel(CDO_Reset_Bit | CDI_Reset_Bit, M_Offset_CDIO_Command);
-               ni_writel(s->io_bits, M_Offset_DIO_Direction);
+               devpriv->writel(dev, CDO_Reset_Bit | CDI_Reset_Bit,
+                               M_Offset_CDIO_Command);
+               devpriv->writel(dev, s->io_bits, M_Offset_DIO_Direction);
        } else {
                s->insn_bits = &ni_dio_insn_bits;
                s->insn_config = &ni_dio_insn_config;
                devpriv->dio_control = DIO_Pins_Dir(s->io_bits);
-               ni_writew(devpriv->dio_control, DIO_Control_Register);
+               devpriv->writew(dev, devpriv->dio_control,
+                               DIO_Control_Register);
        }
 
        /* 8255 device */
@@ -5388,7 +5416,7 @@ static int ni_E_init(struct comedi_device *dev)
                s->insn_config = &ni_m_series_pwm_config;
                s->n_chan = 1;
                s->maxdata = 0;
-               ni_writel(0x0, M_Offset_Cal_PWM);
+               devpriv->writel(dev, 0x0, M_Offset_Cal_PWM);
        } else if (board->reg_type == ni_reg_6143) {
                /*  internal PWM analog output used for AI nonlinearity calibration */
                s->subdev_flags = SDF_INTERNAL;
@@ -5422,10 +5450,10 @@ static int ni_E_init(struct comedi_device *dev)
        if (board->reg_type & ni_reg_m_series_mask) {
                unsigned i;
                s->n_chan = 16;
-               ni_writew(s->state, M_Offset_PFI_DO);
+               devpriv->writew(dev, s->state, M_Offset_PFI_DO);
                for (i = 0; i < NUM_PFI_OUTPUT_SELECT_REGS; ++i) {
-                       ni_writew(devpriv->pfi_output_select_reg[i],
-                                 M_Offset_PFI_Output_Select(i + 1));
+                       devpriv->writew(dev, devpriv->pfi_output_select_reg[i],
+                                       M_Offset_PFI_Output_Select(i + 1));
                }
        } else {
                s->n_chan = 10;
@@ -5559,19 +5587,20 @@ static int ni_E_init(struct comedi_device *dev)
        }
 
        /* DMA setup */
-       ni_writeb(devpriv->ai_ao_select_reg, AI_AO_Select);
-       ni_writeb(devpriv->g0_g1_select_reg, G0_G1_Select);
+       devpriv->writeb(dev, devpriv->ai_ao_select_reg, AI_AO_Select);
+       devpriv->writeb(dev, devpriv->g0_g1_select_reg, G0_G1_Select);
 
        if (board->reg_type & ni_reg_6xxx_mask) {
-               ni_writeb(0, Magic_611x);
+               devpriv->writeb(dev, 0, Magic_611x);
        } else if (board->reg_type & ni_reg_m_series_mask) {
                int channel;
                for (channel = 0; channel < board->n_aochan; ++channel) {
-                       ni_writeb(0xf, M_Offset_AO_Waveform_Order(channel));
-                       ni_writeb(0x0,
-                                 M_Offset_AO_Reference_Attenuation(channel));
+                       devpriv->writeb(dev, 0xf,
+                                       M_Offset_AO_Waveform_Order(channel));
+                       devpriv->writeb(dev, 0x0,
+                                       M_Offset_AO_Reference_Attenuation(channel));
                }
-               ni_writeb(0x0, M_Offset_AO_Calibration);
+               devpriv->writeb(dev, 0x0, M_Offset_AO_Calibration);
        }
 
        return 0;
index e0945f72a869bfe5317b2bff9c01b21bde94fbb8..d61baffb4bf0b9bb4f9726b632ac1bc9c3f2d5fb 100644 (file)
@@ -143,12 +143,35 @@ static const struct ni_board_struct ni_boards[] = {
 
 /* How we access registers */
 
-#define ni_writel(a, b)                (outl((a), (b)+dev->iobase))
-#define ni_readl(a)            (inl((a)+dev->iobase))
-#define ni_writew(a, b)                (outw((a), (b)+dev->iobase))
-#define ni_readw(a)            (inw((a)+dev->iobase))
-#define ni_writeb(a, b)                (outb((a), (b)+dev->iobase))
-#define ni_readb(a)            (inb((a)+dev->iobase))
+static uint8_t mio_cs_inb(struct comedi_device *dev, int reg)
+{
+       return inb(dev->iobase + reg);
+}
+
+static uint16_t mio_cs_inw(struct comedi_device *dev, int reg)
+{
+       return inw(dev->iobase + reg);
+}
+
+static uint32_t mio_cs_inl(struct comedi_device *dev, int reg)
+{
+       return inl(dev->iobase + reg);
+}
+
+static void mio_cs_outb(struct comedi_device *dev, uint8_t val, int reg)
+{
+       outb(val, dev->iobase + reg);
+}
+
+static void mio_cs_outw(struct comedi_device *dev, uint16_t val, int reg)
+{
+       outw(val, dev->iobase + reg);
+}
+
+static void mio_cs_outl(struct comedi_device *dev, uint32_t val, int reg)
+{
+       outl(val, dev->iobase + reg);
+}
 
 /* How we access windowed registers */
 
@@ -163,10 +186,10 @@ static void mio_cs_win_out(struct comedi_device *dev, uint16_t data, int addr)
 
        spin_lock_irqsave(&devpriv->window_lock, flags);
        if (addr < 8) {
-               ni_writew(data, addr * 2);
+               devpriv->writew(dev, data, addr * 2);
        } else {
-               ni_writew(addr, Window_Address);
-               ni_writew(data, Window_Data);
+               devpriv->writew(dev, addr, Window_Address);
+               devpriv->writew(dev, data, Window_Data);
        }
        spin_unlock_irqrestore(&devpriv->window_lock, flags);
 }
@@ -179,10 +202,10 @@ static uint16_t mio_cs_win_in(struct comedi_device *dev, int addr)
 
        spin_lock_irqsave(&devpriv->window_lock, flags);
        if (addr < 8) {
-               ret = ni_readw(addr * 2);
+               ret = devpriv->readw(dev, addr * 2);
        } else {
-               ni_writew(addr, Window_Address);
-               ret = ni_readw(Window_Data);
+               devpriv->writew(dev, addr, Window_Address);
+               ret = devpriv->readw(dev, Window_Data);
        }
        spin_unlock_irqrestore(&devpriv->window_lock, flags);
 
@@ -252,6 +275,14 @@ static int mio_cs_auto_attach(struct comedi_device *dev,
                return ret;
 
        devpriv = dev->private;
+
+       devpriv->readb          = mio_cs_inb;
+       devpriv->readw          = mio_cs_inw;
+       devpriv->readl          = mio_cs_inl;
+       devpriv->writeb         = mio_cs_outb;
+       devpriv->writew         = mio_cs_outw;
+       devpriv->writel         = mio_cs_outl;
+
        devpriv->stc_writew     = mio_cs_win_out;
        devpriv->stc_readw      = mio_cs_win_in;
        devpriv->stc_writel     = win_out2;
index cfe97345dd4785e8586e7d3b65d49a726a70d902..c1c2730cf3e1b1c2b8cda9f1822770fb505eeded 100644 (file)
@@ -1044,12 +1044,47 @@ static const struct ni_board_struct ni_boards[] = {
 
 /* How we access registers */
 
-#define ni_writel(a, b)        (writel((a), devpriv->mite->daq_io_addr + (b)))
-#define ni_readl(a)    (readl(devpriv->mite->daq_io_addr + (a)))
-#define ni_writew(a, b)        (writew((a), devpriv->mite->daq_io_addr + (b)))
-#define ni_readw(a)    (readw(devpriv->mite->daq_io_addr + (a)))
-#define ni_writeb(a, b)        (writeb((a), devpriv->mite->daq_io_addr + (b)))
-#define ni_readb(a)    (readb(devpriv->mite->daq_io_addr + (a)))
+static uint8_t pcimio_readb(struct comedi_device *dev, int reg)
+{
+       struct ni_private *devpriv = dev->private;
+
+       return readb(devpriv->mite->daq_io_addr + reg);
+}
+
+static uint16_t pcimio_readw(struct comedi_device *dev, int reg)
+{
+       struct ni_private *devpriv = dev->private;
+
+       return readw(devpriv->mite->daq_io_addr + reg);
+}
+
+static uint32_t pcimio_readl(struct comedi_device *dev, int reg)
+{
+       struct ni_private *devpriv = dev->private;
+
+       return readl(devpriv->mite->daq_io_addr + reg);
+}
+
+static void pcimio_writeb(struct comedi_device *dev, uint8_t val, int reg)
+{
+       struct ni_private *devpriv = dev->private;
+
+       writeb(val, devpriv->mite->daq_io_addr + reg);
+}
+
+static void pcimio_writew(struct comedi_device *dev, uint16_t val, int reg)
+{
+       struct ni_private *devpriv = dev->private;
+
+       writew(val, devpriv->mite->daq_io_addr + reg);
+}
+
+static void pcimio_writel(struct comedi_device *dev, uint32_t val, int reg)
+{
+       struct ni_private *devpriv = dev->private;
+
+       writel(val, devpriv->mite->daq_io_addr + reg);
+}
 
 /* How we access STC registers */
 
@@ -1067,8 +1102,8 @@ static void e_series_win_out(struct comedi_device *dev, uint16_t data, int reg)
        unsigned long flags;
 
        spin_lock_irqsave(&devpriv->window_lock, flags);
-       ni_writew(reg, Window_Address);
-       ni_writew(data, Window_Data);
+       devpriv->writew(dev, reg, Window_Address);
+       devpriv->writew(dev, data, Window_Data);
        spin_unlock_irqrestore(&devpriv->window_lock, flags);
 }
 
@@ -1079,8 +1114,8 @@ static uint16_t e_series_win_in(struct comedi_device *dev, int reg)
        uint16_t ret;
 
        spin_lock_irqsave(&devpriv->window_lock, flags);
-       ni_writew(reg, Window_Address);
-       ret = ni_readw(Window_Data);
+       devpriv->writew(dev, reg, Window_Address);
+       ret = devpriv->readw(dev, Window_Data);
        spin_unlock_irqrestore(&devpriv->window_lock, flags);
 
        return ret;
@@ -1119,12 +1154,12 @@ static void m_series_stc_writew(struct comedi_device *dev, uint16_t data,
                break;
        case AI_SI2_Load_A_Register:
                /*  this is actually a 32 bit register on m series boards */
-               ni_writel(data, M_Offset_AI_SI2_Load_A);
+               devpriv->writel(dev, data, M_Offset_AI_SI2_Load_A);
                return;
                break;
        case AI_SI2_Load_B_Register:
                /*  this is actually a 32 bit register on m series boards */
-               ni_writel(data, M_Offset_AI_SI2_Load_B);
+               devpriv->writel(dev, data, M_Offset_AI_SI2_Load_B);
                return;
                break;
        case AI_START_STOP_Select_Register:
@@ -1242,7 +1277,7 @@ static void m_series_stc_writew(struct comedi_device *dev, uint16_t data,
                return;
                break;
        }
-       ni_writew(data, offset);
+       devpriv->writew(dev, data, offset);
 }
 
 static uint16_t m_series_stc_readw(struct comedi_device *dev, int reg)
@@ -1261,7 +1296,7 @@ static uint16_t m_series_stc_readw(struct comedi_device *dev, int reg)
                offset = M_Offset_AO_Status_2;
                break;
        case DIO_Serial_Input_Register:
-               return ni_readb(M_Offset_SCXI_Serial_Data_In);
+               return devpriv->readb(dev, M_Offset_SCXI_Serial_Data_In);
                break;
        case Joint_Status_1_Register:
                offset = M_Offset_Joint_Status_1;
@@ -1280,7 +1315,7 @@ static uint16_t m_series_stc_readw(struct comedi_device *dev, int reg)
                return 0;
                break;
        }
-       return ni_readw(offset);
+       return devpriv->readw(dev, offset);
 }
 
 static void m_series_stc_writel(struct comedi_device *dev, uint32_t data,
@@ -1325,7 +1360,7 @@ static void m_series_stc_writel(struct comedi_device *dev, uint32_t data,
                return;
                break;
        }
-       ni_writel(data, offset);
+       devpriv->writel(dev, data, offset);
 }
 
 static uint32_t m_series_stc_readl(struct comedi_device *dev, int reg)
@@ -1354,7 +1389,7 @@ static uint32_t m_series_stc_readl(struct comedi_device *dev, int reg)
                return 0;
                break;
        }
-       return ni_readl(offset);
+       return devpriv->readl(dev, offset);
 }
 
 #define interrupt_pin(a)       0
@@ -1403,12 +1438,14 @@ static void m_series_init_eeprom_buffer(struct comedi_device *dev)
        BUG_ON(serial_number_eeprom_length > sizeof(devpriv->serial_number));
        for (i = 0; i < serial_number_eeprom_length; ++i) {
                char *byte_ptr = (char *)&devpriv->serial_number + i;
-               *byte_ptr = ni_readb(serial_number_eeprom_offset + i);
+               *byte_ptr = devpriv->readb(dev,
+                                          serial_number_eeprom_offset + i);
        }
        devpriv->serial_number = be32_to_cpu(devpriv->serial_number);
 
        for (i = 0; i < M_SERIES_EEPROM_SIZE; ++i)
-               devpriv->eeprom_buffer[i] = ni_readb(Start_Cal_EEPROM + i);
+               devpriv->eeprom_buffer[i] = devpriv->readb(dev,
+                                                       Start_Cal_EEPROM + i);
 
        writel(old_iodwbsr1_bits, devpriv->mite->mite_io_addr + MITE_IODWBSR_1);
        writel(old_iodwbsr_bits, devpriv->mite->mite_io_addr + MITE_IODWBSR);
@@ -1425,18 +1462,24 @@ static void init_6143(struct comedi_device *dev)
        devpriv->stc_writew(dev, 0, Interrupt_Control_Register);
 
        /*  Initialise 6143 AI specific bits */
-       ni_writeb(0x00, Magic_6143);    /*  Set G0,G1 DMA mode to E series version */
-       ni_writeb(0x80, PipelineDelay_6143);    /*  Set EOCMode, ADCMode and pipelinedelay */
-       ni_writeb(0x00, EOC_Set_6143);  /*  Set EOC Delay */
+
+       /* Set G0,G1 DMA mode to E series version */
+       devpriv->writeb(dev, 0x00, Magic_6143);
+       /* Set EOCMode, ADCMode and pipelinedelay */
+       devpriv->writeb(dev, 0x80, PipelineDelay_6143);
+       /* Set EOC Delay */
+       devpriv->writeb(dev, 0x00, EOC_Set_6143);
 
        /* Set the FIFO half full level */
-       ni_writel(board->ai_fifo_depth / 2, AIFIFO_Flag_6143);
+       devpriv->writel(dev, board->ai_fifo_depth / 2, AIFIFO_Flag_6143);
 
        /*  Strobe Relay disable bit */
        devpriv->ai_calib_source_enabled = 0;
-       ni_writew(devpriv->ai_calib_source | Calibration_Channel_6143_RelayOff,
-                 Calibration_Channel_6143);
-       ni_writew(devpriv->ai_calib_source, Calibration_Channel_6143);
+       devpriv->writew(dev, devpriv->ai_calib_source |
+                            Calibration_Channel_6143_RelayOff,
+                       Calibration_Channel_6143);
+       devpriv->writew(dev, devpriv->ai_calib_source,
+                       Calibration_Channel_6143);
 }
 
 static void pcimio_detach(struct comedi_device *dev)
@@ -1489,16 +1532,23 @@ static int pcimio_auto_attach(struct comedi_device *dev,
        if (!devpriv->mite)
                return -ENOMEM;
 
+       devpriv->readb          = pcimio_readb;
+       devpriv->readw          = pcimio_readw;
+       devpriv->readl          = pcimio_readl;
+       devpriv->writeb         = pcimio_writeb;
+       devpriv->writew         = pcimio_writew;
+       devpriv->writel         = pcimio_writel;
+
        if (board->reg_type & ni_reg_m_series_mask) {
-               devpriv->stc_writew = &m_series_stc_writew;
-               devpriv->stc_readw = &m_series_stc_readw;
-               devpriv->stc_writel = &m_series_stc_writel;
-               devpriv->stc_readl = &m_series_stc_readl;
+               devpriv->stc_writew     = m_series_stc_writew;
+               devpriv->stc_readw      = m_series_stc_readw;
+               devpriv->stc_writel     = m_series_stc_writel;
+               devpriv->stc_readl      = m_series_stc_readl;
        } else {
-               devpriv->stc_writew = &e_series_win_out;
-               devpriv->stc_readw = &e_series_win_in;
-               devpriv->stc_writel = &win_out2;
-               devpriv->stc_readl = &win_in2;
+               devpriv->stc_writew     = e_series_win_out;
+               devpriv->stc_readw      = e_series_win_in;
+               devpriv->stc_writel     = win_out2;
+               devpriv->stc_readl      = win_in2;
        }
 
        ret = mite_setup(devpriv->mite);
index 1cc035ba9c93aa170164db132f879265769e1751..a93ef6b488e140784cbbb4562812960e78948d7c 100644 (file)
@@ -1421,6 +1421,13 @@ struct ni_board_struct {
 #define NUM_GPCT       2
 
 struct ni_private {
+       uint8_t (*readb)(struct comedi_device *, int reg);
+       uint16_t (*readw)(struct comedi_device *, int reg);
+       uint32_t (*readl)(struct comedi_device *, int reg);
+       void (*writeb)(struct comedi_device *, uint8_t value, int reg);
+       void (*writew)(struct comedi_device *, uint16_t value, int reg);
+       void (*writel)(struct comedi_device *, uint32_t value, int reg);
+
        uint16_t (*stc_readw)(struct comedi_device *, int reg);
        uint32_t (*stc_readl)(struct comedi_device *, int reg);
        void (*stc_writew)(struct comedi_device *, uint16_t value, int reg);