drm/radeon/kms: clean up i2c
authorAlex Deucher <alexdeucher@gmail.com>
Tue, 10 Nov 2009 20:59:44 +0000 (15:59 -0500)
committerDave Airlie <airlied@redhat.com>
Wed, 2 Dec 2009 01:36:39 +0000 (11:36 +1000)
- Change reg/mask names to match what we use internally
and in the bios
- Clarify how i2c over gpio on radeon actually works

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/radeon_atombios.c
drivers/gpu/drm/radeon/radeon_combios.c
drivers/gpu/drm/radeon/radeon_display.c
drivers/gpu/drm/radeon/radeon_i2c.c
drivers/gpu/drm/radeon/radeon_mode.h

index 2ed88a820935fd26c0877e061b9bc82505535e26..cd07c0e9122c2df3fc0e6e0814bba99034d72ee8 100644 (file)
@@ -82,18 +82,18 @@ static inline struct radeon_i2c_bus_rec radeon_lookup_gpio(struct drm_device
 
        i2c.mask_clk_reg = le16_to_cpu(gpio.usClkMaskRegisterIndex) * 4;
        i2c.mask_data_reg = le16_to_cpu(gpio.usDataMaskRegisterIndex) * 4;
-       i2c.put_clk_reg = le16_to_cpu(gpio.usClkEnRegisterIndex) * 4;
-       i2c.put_data_reg = le16_to_cpu(gpio.usDataEnRegisterIndex) * 4;
-       i2c.get_clk_reg = le16_to_cpu(gpio.usClkY_RegisterIndex) * 4;
-       i2c.get_data_reg = le16_to_cpu(gpio.usDataY_RegisterIndex) * 4;
+       i2c.en_clk_reg = le16_to_cpu(gpio.usClkEnRegisterIndex) * 4;
+       i2c.en_data_reg = le16_to_cpu(gpio.usDataEnRegisterIndex) * 4;
+       i2c.y_clk_reg = le16_to_cpu(gpio.usClkY_RegisterIndex) * 4;
+       i2c.y_data_reg = le16_to_cpu(gpio.usDataY_RegisterIndex) * 4;
        i2c.a_clk_reg = le16_to_cpu(gpio.usClkA_RegisterIndex) * 4;
        i2c.a_data_reg = le16_to_cpu(gpio.usDataA_RegisterIndex) * 4;
        i2c.mask_clk_mask = (1 << gpio.ucClkMaskShift);
        i2c.mask_data_mask = (1 << gpio.ucDataMaskShift);
-       i2c.put_clk_mask = (1 << gpio.ucClkEnShift);
-       i2c.put_data_mask = (1 << gpio.ucDataEnShift);
-       i2c.get_clk_mask = (1 << gpio.ucClkY_Shift);
-       i2c.get_data_mask = (1 << gpio.ucDataY_Shift);
+       i2c.en_clk_mask = (1 << gpio.ucClkEnShift);
+       i2c.en_data_mask = (1 << gpio.ucDataEnShift);
+       i2c.y_clk_mask = (1 << gpio.ucClkY_Shift);
+       i2c.y_data_mask = (1 << gpio.ucDataY_Shift);
        i2c.a_clk_mask = (1 << gpio.ucClkA_Shift);
        i2c.a_data_mask = (1 << gpio.ucDataA_Shift);
        i2c.valid = true;
index 5253cbf6db1f693e8fb6843d5a6e1d0122635e3b..e2a51de67aa14cdfae2c04cf0a12c0eecfa01c69 100644 (file)
@@ -450,29 +450,29 @@ struct radeon_i2c_bus_rec combios_setup_i2c_bus(int ddc_line)
        i2c.mask_data_mask = RADEON_GPIO_EN_0;
        i2c.a_clk_mask = RADEON_GPIO_A_1;
        i2c.a_data_mask = RADEON_GPIO_A_0;
-       i2c.put_clk_mask = RADEON_GPIO_EN_1;
-       i2c.put_data_mask = RADEON_GPIO_EN_0;
-       i2c.get_clk_mask = RADEON_GPIO_Y_1;
-       i2c.get_data_mask = RADEON_GPIO_Y_0;
+       i2c.en_clk_mask = RADEON_GPIO_EN_1;
+       i2c.en_data_mask = RADEON_GPIO_EN_0;
+       i2c.y_clk_mask = RADEON_GPIO_Y_1;
+       i2c.y_data_mask = RADEON_GPIO_Y_0;
        if ((ddc_line == RADEON_LCD_GPIO_MASK) ||
            (ddc_line == RADEON_MDGPIO_EN_REG)) {
                i2c.mask_clk_reg = ddc_line;
                i2c.mask_data_reg = ddc_line;
                i2c.a_clk_reg = ddc_line;
                i2c.a_data_reg = ddc_line;
-               i2c.put_clk_reg = ddc_line;
-               i2c.put_data_reg = ddc_line;
-               i2c.get_clk_reg = ddc_line + 4;
-               i2c.get_data_reg = ddc_line + 4;
+               i2c.en_clk_reg = ddc_line;
+               i2c.en_data_reg = ddc_line;
+               i2c.y_clk_reg = ddc_line + 4;
+               i2c.y_data_reg = ddc_line + 4;
        } else {
                i2c.mask_clk_reg = ddc_line;
                i2c.mask_data_reg = ddc_line;
                i2c.a_clk_reg = ddc_line;
                i2c.a_data_reg = ddc_line;
-               i2c.put_clk_reg = ddc_line;
-               i2c.put_data_reg = ddc_line;
-               i2c.get_clk_reg = ddc_line;
-               i2c.get_data_reg = ddc_line;
+               i2c.en_clk_reg = ddc_line;
+               i2c.en_data_reg = ddc_line;
+               i2c.y_clk_reg = ddc_line;
+               i2c.y_data_reg = ddc_line;
        }
 
        if (ddc_line)
@@ -1567,18 +1567,18 @@ static bool radeon_apply_legacy_quirks(struct drm_device *dev,
                ddc_i2c->mask_data_mask = 0x80;
                ddc_i2c->a_clk_mask = (0x20 << 8);
                ddc_i2c->a_data_mask = 0x80;
-               ddc_i2c->put_clk_mask = (0x20 << 8);
-               ddc_i2c->put_data_mask = 0x80;
-               ddc_i2c->get_clk_mask = (0x20 << 8);
-               ddc_i2c->get_data_mask = 0x80;
+               ddc_i2c->en_clk_mask = (0x20 << 8);
+               ddc_i2c->en_data_mask = 0x80;
+               ddc_i2c->y_clk_mask = (0x20 << 8);
+               ddc_i2c->y_data_mask = 0x80;
                ddc_i2c->mask_clk_reg = RADEON_GPIOPAD_MASK;
                ddc_i2c->mask_data_reg = RADEON_GPIOPAD_MASK;
                ddc_i2c->a_clk_reg = RADEON_GPIOPAD_A;
                ddc_i2c->a_data_reg = RADEON_GPIOPAD_A;
-               ddc_i2c->put_clk_reg = RADEON_GPIOPAD_EN;
-               ddc_i2c->put_data_reg = RADEON_GPIOPAD_EN;
-               ddc_i2c->get_clk_reg = RADEON_LCD_GPIO_Y_REG;
-               ddc_i2c->get_data_reg = RADEON_LCD_GPIO_Y_REG;
+               ddc_i2c->en_clk_reg = RADEON_GPIOPAD_EN;
+               ddc_i2c->en_data_reg = RADEON_GPIOPAD_EN;
+               ddc_i2c->y_clk_reg = RADEON_LCD_GPIO_Y_REG;
+               ddc_i2c->y_data_reg = RADEON_LCD_GPIO_Y_REG;
        }
 
        /* Certain IBM chipset RN50s have a BIOS reporting two VGAs,
@@ -1939,13 +1939,13 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
                                            RBIOS32(lcd_ddc_info + 3);
                                        ddc_i2c.a_data_mask =
                                            RBIOS32(lcd_ddc_info + 7);
-                                       ddc_i2c.put_clk_mask =
+                                       ddc_i2c.en_clk_mask =
                                            RBIOS32(lcd_ddc_info + 3);
-                                       ddc_i2c.put_data_mask =
+                                       ddc_i2c.en_data_mask =
                                            RBIOS32(lcd_ddc_info + 7);
-                                       ddc_i2c.get_clk_mask =
+                                       ddc_i2c.y_clk_mask =
                                            RBIOS32(lcd_ddc_info + 3);
-                                       ddc_i2c.get_data_mask =
+                                       ddc_i2c.y_data_mask =
                                            RBIOS32(lcd_ddc_info + 7);
                                        break;
                                case DDC_GPIO:
@@ -1960,13 +1960,13 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
                                            RBIOS32(lcd_ddc_info + 3);
                                        ddc_i2c.a_data_mask =
                                            RBIOS32(lcd_ddc_info + 7);
-                                       ddc_i2c.put_clk_mask =
+                                       ddc_i2c.en_clk_mask =
                                            RBIOS32(lcd_ddc_info + 3);
-                                       ddc_i2c.put_data_mask =
+                                       ddc_i2c.en_data_mask =
                                            RBIOS32(lcd_ddc_info + 7);
-                                       ddc_i2c.get_clk_mask =
+                                       ddc_i2c.y_clk_mask =
                                            RBIOS32(lcd_ddc_info + 3);
-                                       ddc_i2c.get_data_mask =
+                                       ddc_i2c.y_data_mask =
                                            RBIOS32(lcd_ddc_info + 7);
                                        break;
                                default:
index a3def191e98f3dcf2948436538bcc41d6b0115b1..8b117e82e5e9eaaaf5d35f4f098e9028a8a72ada 100644 (file)
@@ -270,10 +270,10 @@ static void radeon_print_display_setup(struct drm_device *dev)
                                 radeon_connector->ddc_bus->rec.mask_data_reg,
                                 radeon_connector->ddc_bus->rec.a_clk_reg,
                                 radeon_connector->ddc_bus->rec.a_data_reg,
-                                radeon_connector->ddc_bus->rec.put_clk_reg,
-                                radeon_connector->ddc_bus->rec.put_data_reg,
-                                radeon_connector->ddc_bus->rec.get_clk_reg,
-                                radeon_connector->ddc_bus->rec.get_data_reg);
+                                radeon_connector->ddc_bus->rec.en_clk_reg,
+                                radeon_connector->ddc_bus->rec.en_data_reg,
+                                radeon_connector->ddc_bus->rec.y_clk_reg,
+                                radeon_connector->ddc_bus->rec.y_data_reg);
                DRM_INFO("  Encoders:\n");
                list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
                        radeon_encoder = to_radeon_encoder(encoder);
index d8296acb082fc5fd5a35a8a5d9536db27a027f16..e97a3912d99f3626414ef2a9a8dad336f28b0d11 100644 (file)
@@ -78,16 +78,16 @@ void radeon_i2c_do_lock(struct radeon_i2c_chan *i2c, int lock_state)
                                                R200_DVI_I2C_PIN_SEL(R200_SEL_DDC3)));
                }
        }
-       if (lock_state) {
-               temp = RREG32(rec->a_clk_reg);
-               temp &= ~(rec->a_clk_mask);
-               WREG32(rec->a_clk_reg, temp);
-
-               temp = RREG32(rec->a_data_reg);
-               temp &= ~(rec->a_data_mask);
-               WREG32(rec->a_data_reg, temp);
-       }
 
+       /* clear the output pin values */
+       temp = RREG32(rec->a_clk_reg) & ~rec->a_clk_mask;
+       WREG32(rec->a_clk_reg, temp);
+
+       temp = RREG32(rec->a_data_reg) & ~rec->a_data_mask;
+       WREG32(rec->a_data_reg, temp);
+
+
+       /* mask the gpio pins for software use */
        temp = RREG32(rec->mask_clk_reg);
        if (lock_state)
                temp |= rec->mask_clk_mask;
@@ -112,8 +112,9 @@ static int get_clock(void *i2c_priv)
        struct radeon_i2c_bus_rec *rec = &i2c->rec;
        uint32_t val;
 
-       val = RREG32(rec->get_clk_reg);
-       val &= rec->get_clk_mask;
+       /* read the value off the pin */
+       val = RREG32(rec->y_clk_reg);
+       val &= rec->y_clk_mask;
 
        return (val != 0);
 }
@@ -126,8 +127,10 @@ static int get_data(void *i2c_priv)
        struct radeon_i2c_bus_rec *rec = &i2c->rec;
        uint32_t val;
 
-       val = RREG32(rec->get_data_reg);
-       val &= rec->get_data_mask;
+       /* read the value off the pin */
+       val = RREG32(rec->y_data_reg);
+       val &= rec->y_data_mask;
+
        return (val != 0);
 }
 
@@ -138,9 +141,10 @@ static void set_clock(void *i2c_priv, int clock)
        struct radeon_i2c_bus_rec *rec = &i2c->rec;
        uint32_t val;
 
-       val = RREG32(rec->put_clk_reg) & (uint32_t)~(rec->put_clk_mask);
-       val |= clock ? 0 : rec->put_clk_mask;
-       WREG32(rec->put_clk_reg, val);
+       /* set pin direction */
+       val = RREG32(rec->en_clk_reg) & ~rec->en_clk_mask;
+       val |= clock ? 0 : rec->en_clk_mask;
+       WREG32(rec->en_clk_reg, val);
 }
 
 static void set_data(void *i2c_priv, int data)
@@ -150,9 +154,10 @@ static void set_data(void *i2c_priv, int data)
        struct radeon_i2c_bus_rec *rec = &i2c->rec;
        uint32_t val;
 
-       val = RREG32(rec->put_data_reg) & (uint32_t)~(rec->put_data_mask);
-       val |= data ? 0 : rec->put_data_mask;
-       WREG32(rec->put_data_reg, val);
+       /* set pin direction */
+       val = RREG32(rec->en_data_reg) & ~rec->en_data_mask;
+       val |= data ? 0 : rec->en_data_mask;
+       WREG32(rec->en_data_reg, val);
 }
 
 struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
index 491a1ec81a4cbd34422487d3f238dde2cda4ba33..20847a2fc4dc61bc1890c3f5be154d0baaa87761 100644 (file)
@@ -89,24 +89,38 @@ enum radeon_tv_std {
        TV_STD_PAL_CN,
 };
 
+/* radeon gpio-based i2c
+ * 1. "mask" reg and bits
+ *    grabs the gpio pins for software use
+ *    0=not held  1=held
+ * 2. "a" reg and bits
+ *    output pin value
+ *    0=low 1=high
+ * 3. "en" reg and bits
+ *    sets the pin direction
+ *    0=input 1=output
+ * 4. "y" reg and bits
+ *    input pin value
+ *    0=low 1=high
+ */
 struct radeon_i2c_bus_rec {
        bool valid;
        uint32_t mask_clk_reg;
        uint32_t mask_data_reg;
        uint32_t a_clk_reg;
        uint32_t a_data_reg;
-       uint32_t put_clk_reg;
-       uint32_t put_data_reg;
-       uint32_t get_clk_reg;
-       uint32_t get_data_reg;
+       uint32_t en_clk_reg;
+       uint32_t en_data_reg;
+       uint32_t y_clk_reg;
+       uint32_t y_data_reg;
        uint32_t mask_clk_mask;
        uint32_t mask_data_mask;
-       uint32_t put_clk_mask;
-       uint32_t put_data_mask;
-       uint32_t get_clk_mask;
-       uint32_t get_data_mask;
        uint32_t a_clk_mask;
        uint32_t a_data_mask;
+       uint32_t en_clk_mask;
+       uint32_t en_data_mask;
+       uint32_t y_clk_mask;
+       uint32_t y_data_mask;
 };
 
 struct radeon_tmds_pll {