net: encx24j600: Add parentheses to fix precedence

[ Upstream commit 167b3f2dcc62c271f3555b33df17e361bb1fa0ee ]

In functions regmap_encx24j600_phy_reg_read() and
regmap_encx24j600_phy_reg_write() in the conditions of the waiting
cycles for filling the variable 'ret' it is necessary to add parentheses
to prevent wrong assignment due to logical operations precedence.

Found by Linux Verification Center (linuxtesting.org) with SVACE.

Fixes: d70e53262f5c ("net: Microchip encx24j600 driver")
Signed-off-by: Valentina Goncharenko <goncharenko.vp@ispras.ru>
Reviewed-by: Pavan Chebbi <pavan.chebbi@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/net/ethernet/microchip/encx24j600-regmap.c b/drivers/net/ethernet/microchip/encx24j600-regmap.c
index b5de665ce718931e558c00160fab206a9dd9cc2f..44e656048c51ffcf948fff1e0694b1ed80c7646c 100644 (file)
--- a/drivers/net/ethernet/microchip/encx24j600-regmap.c
+++ b/drivers/net/ethernet/microchip/encx24j600-regmap.c
@@ -363,7 +363,7 @@ static int regmap_encx24j600_phy_reg_read(void *context, unsigned int reg,
                goto err_out;
 
        usleep_range(26, 100);
-       while ((ret = regmap_read(ctx->regmap, MISTAT, &mistat) != 0) &&
+       while (((ret = regmap_read(ctx->regmap, MISTAT, &mistat)) != 0) &&
               (mistat & BUSY))
                cpu_relax();
 
@@ -401,7 +401,7 @@ static int regmap_encx24j600_phy_reg_write(void *context, unsigned int reg,
                goto err_out;
 
        usleep_range(26, 100);
-       while ((ret = regmap_read(ctx->regmap, MISTAT, &mistat) != 0) &&
+       while (((ret = regmap_read(ctx->regmap, MISTAT, &mistat)) != 0) &&
               (mistat & BUSY))
                cpu_relax();