x86, apic: remove IRQ_DEST_MODE / IRQ_DELIVERY_MODE
authorIngo Molnar <mingo@elte.hu>
Wed, 28 Jan 2009 03:09:58 +0000 (04:09 +0100)
committerIngo Molnar <mingo@elte.hu>
Wed, 28 Jan 2009 22:20:13 +0000 (23:20 +0100)
Remove the wrapper macros IRQ_DEST_MODE and IRQ_DELIVERY_MODE.

The typical 32-bit and the 64-bit build all dereference via the genapic,
so it's pointless to hide that indirection via these ugly macros.

Furthermore, it also obscures subarchitecture details.

So replace it with apic->irq_dest_mode / etc. accesses.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
12 files changed:
arch/x86/include/asm/bigsmp/apic.h
arch/x86/include/asm/es7000/apic.h
arch/x86/include/asm/mach-default/mach_apic.h
arch/x86/include/asm/mach-generic/mach_apic.h
arch/x86/include/asm/numaq/apic.h
arch/x86/include/asm/summit/apic.h
arch/x86/kernel/io_apic.c
arch/x86/mach-generic/bigsmp.c
arch/x86/mach-generic/default.c
arch/x86/mach-generic/es7000.c
arch/x86/mach-generic/numaq.c
arch/x86/mach-generic/summit.c

index 8ff8bba88338430db6f0b22543155457e39c1932..293551b0e610b6b278555ddf648568769912ce25 100644 (file)
@@ -21,8 +21,8 @@ static inline const cpumask_t *target_cpus(void)
 #undef APIC_DEST_LOGICAL
 #define APIC_DEST_LOGICAL      0
 #define APIC_DFR_VALUE         (APIC_DFR_FLAT)
-#define IRQ_DELIVERY_MODE      (dest_Fixed)
-#define IRQ_DEST_MODE          (0)    /* phys delivery to target proc */
+#define BIGSMP_IRQ_DELIVERY_MODE (dest_Fixed)
+#define BIGSMP_IRQ_DEST_MODE   (0)    /* phys delivery to target proc */
 #define NO_BALANCE_IRQ         (0)
 
 static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
index 830e8731cc05d4131a882e8e6ac05cfd211b8a9d..690016683f21eba6ea9d37df07867b9aed2b11e1 100644 (file)
@@ -27,8 +27,8 @@ static inline const cpumask_t *target_cpus(void)
 #define NO_BALANCE_IRQ_CLUSTER         (1)
 
 #define APIC_DFR_VALUE         (APIC_DFR_FLAT)
-#define IRQ_DELIVERY_MODE      (dest_Fixed)
-#define IRQ_DEST_MODE          (0)    /* phys delivery to target procs */
+#define ES7000_IRQ_DELIVERY_MODE (dest_Fixed)
+#define ES7000_IRQ_DEST_MODE   (0)    /* phys delivery to target procs */
 #define NO_BALANCE_IRQ         (0)
 #undef  APIC_DEST_LOGICAL
 #define APIC_DEST_LOGICAL      0x0
index b5364793262a801bcf6555e20f5cc90bcbe524f2..eafbf4f20387f2ed78ae270e5392541f1aaf06e3 100644 (file)
@@ -22,7 +22,6 @@ static inline const struct cpumask *target_cpus(void)
 
 #ifdef CONFIG_X86_64
 #include <asm/genapic.h>
-#define IRQ_DELIVERY_MODE (apic->irq_delivery_mode)
 #define IRQ_DEST_MODE (apic->irq_dest_mode)
 #define TARGET_CPUS      (apic->target_cpus())
 #define init_apic_ldr (apic->init_apic_ldr)
@@ -35,8 +34,8 @@ static inline const struct cpumask *target_cpus(void)
 #define wakeup_secondary_cpu (apic->wakeup_cpu)
 extern void setup_apic_routing(void);
 #else
-#define IRQ_DELIVERY_MODE dest_LowestPrio
-#define IRQ_DEST_MODE 1     /* logical delivery broadcast to all procs */
+#define DEFAULT_IRQ_DELIVERY_MODE dest_LowestPrio
+#define DEFAULT_IRQ_DEST_MODE 1     /* logical delivery broadcast to all procs */
 #define TARGET_CPUS (target_cpus())
 #define wakeup_secondary_cpu wakeup_secondary_cpu_via_init
 /*
index 03492f2219ed8dc1b5670af95a203edfb0fb2733..387a5d00c43d65ffc3eee17109d945d2eee81c80 100644 (file)
@@ -5,8 +5,6 @@
 
 #define esr_disable (apic->ESR_DISABLE)
 #define NO_BALANCE_IRQ (apic->no_balance_irq)
-#define IRQ_DELIVERY_MODE (apic->irq_delivery_mode)
-#define IRQ_DEST_MODE (apic->irq_dest_mode)
 #undef APIC_DEST_LOGICAL
 #define APIC_DEST_LOGICAL (apic->apic_destination_logical)
 #define TARGET_CPUS      (apic->target_cpus())
index d885e35df18e0e82f3214cb3b35519d0c001d0a7..7746035c5911395a7e28d20ffcd1549a16a02f4b 100644 (file)
@@ -15,8 +15,8 @@ static inline const cpumask_t *target_cpus(void)
 #define NO_BALANCE_IRQ (1)
 #define esr_disable (1)
 
-#define IRQ_DELIVERY_MODE dest_LowestPrio
-#define IRQ_DEST_MODE 0     /* physical delivery on LOCAL quad */
+#define NUMAQ_IRQ_DELIVERY_MODE dest_LowestPrio
+#define NUMAQ_IRQ_DEST_MODE 0     /* physical delivery on LOCAL quad */
  
 static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
 {
index 0b7d0d14e5689f7fa8d488bc771a7791acd40f3c..ea2abe9b5979ce42fab1b959a1648234b1e63054 100644 (file)
@@ -24,8 +24,8 @@ static inline const cpumask_t *target_cpus(void)
        return &cpumask_of_cpu(0);
 }
 
-#define IRQ_DELIVERY_MODE (dest_LowestPrio)
-#define IRQ_DEST_MODE 1     /* logical delivery broadcast to all procs */
+#define SUMMIT_IRQ_DELIVERY_MODE (dest_LowestPrio)
+#define SUMMIT_IRQ_DEST_MODE 1     /* logical delivery broadcast to all procs */
 
 static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
 {
index 5f967b9c9afdaa672ee7715d18686be6edeaec89..301b6571d7007d9454930177b2dbc081d45377c1 100644 (file)
@@ -1514,9 +1514,9 @@ static int setup_ioapic_entry(int apic_id, int irq,
                memset(&irte, 0, sizeof(irte));
 
                irte.present = 1;
-               irte.dst_mode = IRQ_DEST_MODE;
+               irte.dst_mode = apic->irq_dest_mode;
                irte.trigger_mode = trigger;
-               irte.dlvry_mode = IRQ_DELIVERY_MODE;
+               irte.dlvry_mode = apic->irq_delivery_mode;
                irte.vector = vector;
                irte.dest_id = IRTE_DEST(destination);
 
@@ -1529,8 +1529,8 @@ static int setup_ioapic_entry(int apic_id, int irq,
        } else
 #endif
        {
-               entry->delivery_mode = IRQ_DELIVERY_MODE;
-               entry->dest_mode = IRQ_DEST_MODE;
+               entry->delivery_mode = apic->irq_delivery_mode;
+               entry->dest_mode = apic->irq_dest_mode;
                entry->dest = destination;
        }
 
@@ -1659,10 +1659,10 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic_id, unsigned int pin,
         * We use logical delivery to get the timer IRQ
         * to the first CPU.
         */
-       entry.dest_mode = IRQ_DEST_MODE;
+       entry.dest_mode = apic->irq_dest_mode;
        entry.mask = 1;                                 /* mask IRQ now */
        entry.dest = cpu_mask_to_apicid(TARGET_CPUS);
-       entry.delivery_mode = IRQ_DELIVERY_MODE;
+       entry.delivery_mode = apic->irq_delivery_mode;
        entry.polarity = 0;
        entry.trigger = 0;
        entry.vector = vector;
@@ -3279,9 +3279,9 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
                memset (&irte, 0, sizeof(irte));
 
                irte.present = 1;
-               irte.dst_mode = IRQ_DEST_MODE;
+               irte.dst_mode = apic->irq_dest_mode;
                irte.trigger_mode = 0; /* edge */
-               irte.dlvry_mode = IRQ_DELIVERY_MODE;
+               irte.dlvry_mode = apic->irq_delivery_mode;
                irte.vector = cfg->vector;
                irte.dest_id = IRTE_DEST(dest);
 
@@ -3299,10 +3299,10 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
                msg->address_hi = MSI_ADDR_BASE_HI;
                msg->address_lo =
                        MSI_ADDR_BASE_LO |
-                       ((IRQ_DEST_MODE == 0) ?
+                       ((apic->irq_dest_mode == 0) ?
                                MSI_ADDR_DEST_MODE_PHYSICAL:
                                MSI_ADDR_DEST_MODE_LOGICAL) |
-                       ((IRQ_DELIVERY_MODE != dest_LowestPrio) ?
+                       ((apic->irq_delivery_mode != dest_LowestPrio) ?
                                MSI_ADDR_REDIRECTION_CPU:
                                MSI_ADDR_REDIRECTION_LOWPRI) |
                        MSI_ADDR_DEST_ID(dest);
@@ -3310,7 +3310,7 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
                msg->data =
                        MSI_DATA_TRIGGER_EDGE |
                        MSI_DATA_LEVEL_ASSERT |
-                       ((IRQ_DELIVERY_MODE != dest_LowestPrio) ?
+                       ((apic->irq_delivery_mode != dest_LowestPrio) ?
                                MSI_DATA_DELIVERY_FIXED:
                                MSI_DATA_DELIVERY_LOWPRI) |
                        MSI_DATA_VECTOR(cfg->vector);
@@ -3711,11 +3711,11 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
                        HT_IRQ_LOW_BASE |
                        HT_IRQ_LOW_DEST_ID(dest) |
                        HT_IRQ_LOW_VECTOR(cfg->vector) |
-                       ((IRQ_DEST_MODE == 0) ?
+                       ((apic->irq_dest_mode == 0) ?
                                HT_IRQ_LOW_DM_PHYSICAL :
                                HT_IRQ_LOW_DM_LOGICAL) |
                        HT_IRQ_LOW_RQEOI_EDGE |
-                       ((IRQ_DELIVERY_MODE != dest_LowestPrio) ?
+                       ((apic->irq_delivery_mode != dest_LowestPrio) ?
                                HT_IRQ_LOW_MT_FIXED :
                                HT_IRQ_LOW_MT_ARBITRATED) |
                        HT_IRQ_LOW_IRQ_MASKED;
@@ -3763,8 +3763,8 @@ int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,
        BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long));
 
        entry->vector = cfg->vector;
-       entry->delivery_mode = IRQ_DELIVERY_MODE;
-       entry->dest_mode = IRQ_DEST_MODE;
+       entry->delivery_mode = apic->irq_delivery_mode;
+       entry->dest_mode = apic->irq_dest_mode;
        entry->polarity = 0;
        entry->trigger = 0;
        entry->mask = 0;
index c15c1aa2dc7f2c55e2610e27847996d22a8eb0b0..e8c1ceca7c94d2b7bb7f0acea3c256b47f7a6ba0 100644 (file)
@@ -64,8 +64,8 @@ struct genapic apic_bigsmp = {
        .acpi_madt_oem_check            = NULL,
        .apic_id_registered             = bigsmp_apic_id_registered,
 
-       .irq_delivery_mode              = IRQ_DELIVERY_MODE,
-       .irq_dest_mode                  = IRQ_DEST_MODE,
+       .irq_delivery_mode              = BIGSMP_IRQ_DELIVERY_MODE,
+       .irq_dest_mode                  = BIGSMP_IRQ_DEST_MODE,
 
        .target_cpus                    = target_cpus,
        .ESR_DISABLE                    = esr_disable,
index d32b175eff88466153651dd01883b74bcf126cd1..0482106f0e19cc13923b8289746bd7bffe46b710 100644 (file)
@@ -31,8 +31,8 @@ struct genapic apic_default = {
        .acpi_madt_oem_check            = NULL,
        .apic_id_registered             = default_apic_id_registered,
 
-       .irq_delivery_mode              = IRQ_DELIVERY_MODE,
-       .irq_dest_mode                  = IRQ_DEST_MODE,
+       .irq_delivery_mode              = DEFAULT_IRQ_DELIVERY_MODE,
+       .irq_dest_mode                  = DEFAULT_IRQ_DEST_MODE,
 
        .target_cpus                    = target_cpus,
        .ESR_DISABLE                    = esr_disable,
index 06653892953ec481d2e5a577136113ab5bf968d1..5d97408919bb720757108c36aa2ba57eb8edbb80 100644 (file)
@@ -107,8 +107,8 @@ struct genapic apic_es7000 = {
        .acpi_madt_oem_check            = es7000_acpi_madt_oem_check,
        .apic_id_registered             = es7000_apic_id_registered,
 
-       .irq_delivery_mode              = IRQ_DELIVERY_MODE,
-       .irq_dest_mode                  = IRQ_DEST_MODE,
+       .irq_delivery_mode              = ES7000_IRQ_DELIVERY_MODE,
+       .irq_dest_mode                  = ES7000_IRQ_DEST_MODE,
 
        .target_cpus                    = target_cpus,
        .ESR_DISABLE                    = esr_disable,
index 401957142fda9535d5a6cb3223956ab47c851354..77ac66935fdd5de1cc564d1b90d162edb422beec 100644 (file)
@@ -51,8 +51,8 @@ struct genapic apic_numaq = {
        .acpi_madt_oem_check            = NULL,
        .apic_id_registered             = numaq_apic_id_registered,
 
-       .irq_delivery_mode              = IRQ_DELIVERY_MODE,
-       .irq_dest_mode                  = IRQ_DEST_MODE,
+       .irq_delivery_mode              = NUMAQ_IRQ_DELIVERY_MODE,
+       .irq_dest_mode                  = NUMAQ_IRQ_DEST_MODE,
 
        .target_cpus                    = target_cpus,
        .ESR_DISABLE                    = esr_disable,
index 946da7aa7622b45993017fc3dd595aadbbf5088a..7b3f43caf2ae8b12f6a80b2ac03478624746f400 100644 (file)
@@ -44,8 +44,8 @@ struct genapic apic_summit = {
        .acpi_madt_oem_check            = summit_acpi_madt_oem_check,
        .apic_id_registered             = summit_apic_id_registered,
 
-       .irq_delivery_mode              = IRQ_DELIVERY_MODE,
-       .irq_dest_mode                  = IRQ_DEST_MODE,
+       .irq_delivery_mode              = SUMMIT_IRQ_DELIVERY_MODE,
+       .irq_dest_mode                  = SUMMIT_IRQ_DEST_MODE,
 
        .target_cpus                    = target_cpus,
        .ESR_DISABLE                    = esr_disable,