ASoC: samsung: i2s: Provide I2S device for registered clocks
authorMarek Szyprowski <m.szyprowski@samsung.com>
Thu, 29 Dec 2016 11:34:07 +0000 (12:34 +0100)
committerMark Brown <broonie@kernel.org>
Sat, 31 Dec 2016 18:36:31 +0000 (18:36 +0000)
This patch adds pointer to I2S device to clk_register_* functions.
This in the future allow clock framework to ensure proper runtime state
of the I2S device during all operations on the clocks provided by I2S
module.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/samsung/i2s.c

index b2b9ee4a177a171b153a2404854b4fee8f3c6291..2a5b92c672fbff67b869ccd2863d78993c6cb3a2 100644 (file)
@@ -1191,13 +1191,13 @@ static int i2s_register_clock_provider(struct platform_device *pdev)
                u32 val = readl(i2s->addr + I2SPSR);
                writel(val | PSR_PSREN, i2s->addr + I2SPSR);
 
-               i2s->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(NULL,
+               i2s->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev,
                                "i2s_rclksrc", p_names, ARRAY_SIZE(p_names),
                                CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
                                i2s->addr + I2SMOD, reg_info->rclksrc_off,
                                1, 0, i2s->lock);
 
-               i2s->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(NULL,
+               i2s->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev,
                                "i2s_presc", "i2s_rclksrc",
                                CLK_SET_RATE_PARENT,
                                i2s->addr + I2SPSR, 8, 6, 0, i2s->lock);
@@ -1208,7 +1208,7 @@ static int i2s_register_clock_provider(struct platform_device *pdev)
        of_property_read_string_index(dev->of_node,
                                "clock-output-names", 0, &clk_name[0]);
 
-       i2s->clk_table[CLK_I2S_CDCLK] = clk_register_gate(NULL, clk_name[0],
+       i2s->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev, clk_name[0],
                                p_names[0], CLK_SET_RATE_PARENT,
                                i2s->addr + I2SMOD, reg_info->cdclkcon_off,
                                CLK_GATE_SET_TO_DISABLE, i2s->lock);