[ARM] pxa: add pxa3xx NAND device and clock sources
authorEric Miao <eric.miao@marvell.com>
Mon, 2 Jun 2008 07:22:03 +0000 (15:22 +0800)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Wed, 9 Jul 2008 20:38:32 +0000 (21:38 +0100)
A pxa3xx_set_nand_info() is also introduced to set the PXA3xx NAND
driver specific platform_data structure pointer.

Signed-off-by: Eric Miao <eric.miao@marvell.com>
Cc: Sergey Podstavin <spodstavin@ru.mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-pxa/devices.c
arch/arm/mach-pxa/devices.h
arch/arm/mach-pxa/pxa300.c
arch/arm/mach-pxa/pxa320.c
include/asm-arm/arch-pxa/pxa3xx_nand.h

index abc161dd083ab788bb9d26b1f750c170ab322338..84489dc51d810126c08c444f91d4d10fb0823574 100644 (file)
@@ -16,6 +16,7 @@
 #include <asm/arch/pxa2xx_spi.h>
 #include <asm/arch/camera.h>
 #include <asm/arch/audio.h>
+#include <asm/arch/pxa3xx_nand.h>
 
 #include "devices.h"
 #include "generic.h"
@@ -831,6 +832,48 @@ void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
        pxa_register_device(&pxa3xx_device_mci3, info);
 }
 
+static struct resource pxa3xx_resources_nand[] = {
+       [0] = {
+               .start  = 0x43100000,
+               .end    = 0x43100053,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = IRQ_NAND,
+               .end    = IRQ_NAND,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [2] = {
+               /* DRCMR for Data DMA */
+               .start  = 97,
+               .end    = 97,
+               .flags  = IORESOURCE_DMA,
+       },
+       [3] = {
+               /* DRCMR for Command DMA */
+               .start  = 99,
+               .end    = 99,
+               .flags  = IORESOURCE_DMA,
+       },
+};
+
+static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
+
+struct platform_device pxa3xx_device_nand = {
+       .name           = "pxa3xx-nand",
+       .id             = -1,
+       .dev            = {
+               .dma_mask = &pxa3xx_nand_dma_mask,
+               .coherent_dma_mask = DMA_BIT_MASK(32),
+       },
+       .num_resources  = ARRAY_SIZE(pxa3xx_resources_nand),
+       .resource       = pxa3xx_resources_nand,
+};
+
+void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
+{
+       pxa_register_device(&pxa3xx_device_nand, info);
+}
 #endif /* CONFIG_PXA3xx */
 
 /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
index b852eb18daa5f78526a2e40d835b4d166bc93594..887c738f5911dd6d333959b489aa3dad5af35731 100644 (file)
@@ -31,4 +31,6 @@ extern struct platform_device pxa25x_device_pwm1;
 extern struct platform_device pxa27x_device_pwm0;
 extern struct platform_device pxa27x_device_pwm1;
 
+extern struct platform_device pxa3xx_device_nand;
+
 void __init pxa_register_device(struct platform_device *dev, void *data);
index a0db6fa7c323f5bb7441b4536ecc5aff992222c2..da92e9733886432edc3b38cfccceeac898ce45df 100644 (file)
@@ -85,6 +85,10 @@ static struct pxa3xx_mfp_addr_map pxa310_mfp_addr_map[] __initdata = {
        MFP_ADDR_END,
 };
 
+static struct clk common_clks[] = {
+       PXA3xx_CKEN("NANDCLK", NAND, 156000000, 0, &pxa3xx_device_nand.dev),
+};
+
 static struct clk pxa310_clks[] = {
        PXA3xx_CKEN("MMCCLK", MMC3, 19500000, 0, &pxa3xx_device_mci3.dev),
 };
@@ -94,6 +98,7 @@ static int __init pxa300_init(void)
        if (cpu_is_pxa300() || cpu_is_pxa310()) {
                pxa3xx_init_mfp();
                pxa3xx_mfp_init_addr(pxa300_mfp_addr_map);
+               clks_register(ARRAY_AND_SIZE(common_clks));
        }
 
        if (cpu_is_pxa310()) {
index 44ef0b95db00bc9b28d9e54db10b5e16480d0a6f..c557c23a1efeaa9cc5e00b0b5f140f78ca340d94 100644 (file)
 
 #include <linux/module.h>
 #include <linux/kernel.h>
+#include <linux/platform_device.h>
 
 #include <asm/hardware.h>
 #include <asm/arch/mfp.h>
+#include <asm/arch/pxa3xx-regs.h>
 #include <asm/arch/mfp-pxa320.h>
 
+#include "generic.h"
+#include "devices.h"
+#include "clock.h"
+
 static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
 
        MFP_ADDR_X(GPIO0,  GPIO4,   0x0124),
@@ -74,11 +80,16 @@ static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
        MFP_ADDR_END,
 };
 
+static struct clk pxa320_clks[] = {
+       PXA3xx_CKEN("NANDCLK", NAND, 104000000, 0, &pxa3xx_device_nand.dev),
+};
+
 static int __init pxa320_init(void)
 {
        if (cpu_is_pxa320()) {
                pxa3xx_init_mfp();
                pxa3xx_mfp_init_addr(pxa320_mfp_addr_map);
+               clks_register(ARRAY_AND_SIZE(pxa320_clks));
        }
 
        return 0;
index 81a8937486cbbcf1ef21ef7f6ff9d867c5cb0d98..eb4b190b6657256898dfbc2da475a32a98ee6f4d 100644 (file)
@@ -15,4 +15,6 @@ struct pxa3xx_nand_platform_data {
        struct mtd_partition *parts;
        unsigned int    nr_parts;
 };
+
+extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info);
 #endif /* __ASM_ARCH_PXA3XX_NAND_H */