ARM: OMAP4: hwmod data: add aes1

This fixes the following error during kernel boot:

platform 4b501000.aes: Cannot lookup hwmod 'aes1'

Unfortunately the AES module is only documented partly
in the OMAP4430 TRM. I found an old patch from Joel,
which I took over and updated for currently mainline.

Signed-off-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 0855434773facc3342f1321242aa3dff6a0ab0ea..7833caf277b64ee893a5b1f3a3fe29a88a1d8b85 100644 (file)
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -960,6 +960,46 @@ static struct omap_hwmod omap44xx_emif2_hwmod = {
        },
 };
 
+/*
+    Crypto modules AES0/1 belong to:
+       PD_L4_PER power domain
+       CD_L4_SEC clock domain
+       On the L3, the AES modules are mapped to
+       L3_CLK2: Peripherals and multimedia sub clock domain
+*/
+static struct omap_hwmod_class_sysconfig omap44xx_aes_sysc = {
+       .rev_offs       = 0x80,
+       .sysc_offs      = 0x84,
+       .syss_offs      = 0x88,
+       .sysc_flags     = SYSS_HAS_RESET_STATUS,
+};
+
+static struct omap_hwmod_class omap44xx_aes_hwmod_class = {
+       .name           = "aes",
+       .sysc           = &omap44xx_aes_sysc,
+};
+
+static struct omap_hwmod omap44xx_aes1_hwmod = {
+       .name           = "aes1",
+       .class          = &omap44xx_aes_hwmod_class,
+       .clkdm_name     = "l4_secure_clkdm",
+       .main_clk       = "l3_div_ck",
+       .prcm           = {
+               .omap4  = {
+                       .context_offs   = OMAP4_RM_L4SEC_AES1_CONTEXT_OFFSET,
+                       .clkctrl_offs   = OMAP4_CM_L4SEC_AES1_CLKCTRL_OFFSET,
+                       .modulemode     = MODULEMODE_SWCTRL,
+               },
+       },
+};
+
+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__aes1 = {
+       .master         = &omap44xx_l4_per_hwmod,
+       .slave          = &omap44xx_aes1_hwmod,
+       .clk            = "l3_div_ck",
+       .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 /*
  * 'fdif' class
  * face detection hw accelerator module
@@ -4801,6 +4841,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
        &omap44xx_l4_abe__wd_timer3_dma,
        &omap44xx_mpu__emif1,
        &omap44xx_mpu__emif2,
+       &omap44xx_l3_main_2__aes1,
        NULL,
 };