drm/i915: set CB tuning also for the reduce clock
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 4 Apr 2013 20:20:34 +0000 (22:20 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 18 Apr 2013 07:43:09 +0000 (09:43 +0200)
Since the ratio is different, we also need to pass in the parameters
for the reduced clock. Might or might not reduce flicker for the
auto-downclocking on lvds/eDP.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c

index f235e8a48b3857cdbaefb1952581fb2d4987d059..b884932c2e00f14d756fca5b4165a7f1149725cc 100644 (file)
@@ -5469,7 +5469,8 @@ static void ironlake_fdi_set_m_n(struct drm_crtc *crtc)
 }
 
 static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
-                                     intel_clock_t *clock, u32 *fp)
+                                     intel_clock_t *clock, u32 *fp,
+                                     intel_clock_t *reduced_clock, u32 *fp2)
 {
        struct drm_crtc *crtc = &intel_crtc->base;
        struct drm_device *dev = crtc->dev;
@@ -5511,6 +5512,9 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
        if (clock->m < factor * clock->n)
                *fp |= FP_CB_TUNE;
 
+       if (fp2 && (reduced_clock->m < factor * reduced_clock->n))
+               *fp2 |= FP_CB_TUNE;
+
        dpll = 0;
 
        if (is_lvds)
@@ -5626,7 +5630,8 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
                fp2 = reduced_clock.n << 16 | reduced_clock.m1 << 8 |
                        reduced_clock.m2;
 
-       dpll = ironlake_compute_dpll(intel_crtc, &clock, &fp);
+       dpll = ironlake_compute_dpll(intel_crtc, &clock, &fp, &reduced_clock,
+                                    has_reduced_clock ? &fp2 : NULL);
 
        DRM_DEBUG_KMS("Mode for pipe %d:\n", pipe);
        drm_mode_debug_printmodeline(mode);