ARM: OMAP: SRAM: Move sram-fn.S from plat-omap to mach-omap1

This file is omap1 specific.

Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index c06f5254c0f334eed235802f1905a2c9def0771e..5e9416e024dd7b9b26986d498c2d860a08a94a49 100644 (file)
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -3,7 +3,7 @@
 #
 
 # Common support
-obj-y := io.o id.o clock.o irq.o mux.o serial.o devices.o
+obj-y := io.o id.o sram.o clock.o irq.o mux.o serial.o devices.o
 
 obj-$(CONFIG_OMAP_MPU_TIMER)   += time.o
 obj-$(CONFIG_OMAP_32K_TIMER)   += timer32k.o

diff --git a/arch/arm/mach-omap1/sram.S b/arch/arm/mach-omap1/sram.S
new file mode 100644 (file)
index 0000000..9e1813c
--- /dev/null
+++ b/arch/arm/mach-omap1/sram.S
@@ -0,0 +1,57 @@
+/*
+ * linux/arch/arm/plat-omap/sram-fn.S
+ *
+ * Functions that need to be run in internal SRAM
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <asm/arch/io.h>
+#include <asm/hardware.h>
+
+       .text
+
+/*
+ * Reprograms ULPD and CKCTL.
+ */
+ENTRY(sram_reprogram_clock)
+       stmfd   sp!, {r0 - r12, lr}             @ save registers on stack
+
+       mov     r2, #IO_ADDRESS(DPLL_CTL) & 0xff000000
+       orr     r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x00ff0000
+       orr     r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x0000ff00
+
+       mov     r3, #IO_ADDRESS(ARM_CKCTL) & 0xff000000
+       orr     r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x00ff0000
+       orr     r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x0000ff00
+
+       tst     r0, #1 << 4                     @ want lock mode?
+       beq     newck                           @ nope
+       bic     r0, r0, #1 << 4                 @ else clear lock bit
+       strh    r0, [r2]                        @ set dpll into bypass mode
+       orr     r0, r0, #1 << 4                 @ set lock bit again
+
+newck:
+       strh    r1, [r3]                        @ write new ckctl value
+       strh    r0, [r2]                        @ write new dpll value
+
+       mov     r4, #0x0700                     @ let the clocks settle
+       orr     r4, r4, #0x00ff
+delay: sub     r4, r4, #1
+       cmp     r4, #0
+       bne     delay
+
+lock:  ldrh    r4, [r2], #0                    @ read back dpll value
+       tst     r0, #1 << 4                     @ want lock mode?
+       beq     out                             @ nope
+       tst     r4, #1 << 0                     @ dpll rate locked?
+       beq     lock                            @ try again
+
+out:
+       ldmfd   sp!, {r0 - r12, pc}             @ restore regs and return
+ENTRY(sram_reprogram_clock_sz)
+       .word   . - sram_reprogram_clock

diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index bc639a30d6d1718890576735810772cd51a34e4f..2c4051cc79a13f249e32d4cb6abf31841ee1c258 100644 (file)
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -3,7 +3,7 @@
 #
 
 # Common support
-obj-y := common.o sram.o sram-fn.o clock.o devices.o dma.o mux.o gpio.o \
+obj-y := common.o sram.o clock.o devices.o dma.o mux.o gpio.o \
         usb.o fb.o
 obj-m :=
 obj-n :=

diff --git a/arch/arm/plat-omap/sram-fn.S b/arch/arm/plat-omap/sram-fn.S
deleted file mode 100644 (file)
index 9e1813c..0000000
--- a/arch/arm/plat-omap/sram-fn.S
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * linux/arch/arm/plat-omap/sram-fn.S
- *
- * Functions that need to be run in internal SRAM
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-#include <asm/arch/io.h>
-#include <asm/hardware.h>
-
-       .text
-
-/*
- * Reprograms ULPD and CKCTL.
- */
-ENTRY(sram_reprogram_clock)
-       stmfd   sp!, {r0 - r12, lr}             @ save registers on stack
-
-       mov     r2, #IO_ADDRESS(DPLL_CTL) & 0xff000000
-       orr     r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x00ff0000
-       orr     r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x0000ff00
-
-       mov     r3, #IO_ADDRESS(ARM_CKCTL) & 0xff000000
-       orr     r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x00ff0000
-       orr     r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x0000ff00
-
-       tst     r0, #1 << 4                     @ want lock mode?
-       beq     newck                           @ nope
-       bic     r0, r0, #1 << 4                 @ else clear lock bit
-       strh    r0, [r2]                        @ set dpll into bypass mode
-       orr     r0, r0, #1 << 4                 @ set lock bit again
-
-newck:
-       strh    r1, [r3]                        @ write new ckctl value
-       strh    r0, [r2]                        @ write new dpll value
-
-       mov     r4, #0x0700                     @ let the clocks settle
-       orr     r4, r4, #0x00ff
-delay: sub     r4, r4, #1
-       cmp     r4, #0
-       bne     delay
-
-lock:  ldrh    r4, [r2], #0                    @ read back dpll value
-       tst     r0, #1 << 4                     @ want lock mode?
-       beq     out                             @ nope
-       tst     r4, #1 << 0                     @ dpll rate locked?
-       beq     lock                            @ try again
-
-out:
-       ldmfd   sp!, {r0 - r12, pc}             @ restore regs and return
-ENTRY(sram_reprogram_clock_sz)
-       .word   . - sram_reprogram_clock