iommu/arm-smmu-v3: Enable ACPI based HiSilicon CMD_PREFETCH quirk(erratum 161010701)
authorshameer <shameerali.kolothum.thodi@huawei.com>
Wed, 17 May 2017 09:12:05 +0000 (10:12 +0100)
committerWill Deacon <will.deacon@arm.com>
Fri, 23 Jun 2017 16:58:04 +0000 (17:58 +0100)
HiSilicon SMMUv3 on Hip06/Hip07 platforms doesn't support CMD_PREFETCH
command. The dt based support for this quirk is already present in the
driver(hisilicon,broken-prefetch-cmd). This adds ACPI support for the
quirk using the IORT smmu model number.

Signed-off-by: shameer <shameerali.kolothum.thodi@huawei.com>
Signed-off-by: hanjun <guohanjun@huawei.com>
[will: rewrote patch]
Signed-off-by: Will Deacon <will.deacon@arm.com>
Documentation/arm64/silicon-errata.txt
drivers/iommu/arm-smmu-v3.c

index 4693a328947a59ac0a7b066269aa0346b554d76e..ef4e43590685d95371e6c0c45568ffac0246d9f2 100644 (file)
@@ -67,6 +67,7 @@ stable kernels.
 | Freescale/NXP  | LS2080A/LS1043A | A-008585        | FSL_ERRATUM_A008585         |
 |                |                 |                 |                             |
 | Hisilicon      | Hip0{5,6,7}     | #161010101      | HISILICON_ERRATUM_161010101 |
+| Hisilicon      | Hip0{6,7}       | #161010701      | N/A                         |
 |                |                 |                 |                             |
 | Qualcomm Tech. | Falkor v1       | E1003           | QCOM_FALKOR_ERRATUM_1003    |
 | Qualcomm Tech. | Falkor v1       | E1009           | QCOM_FALKOR_ERRATUM_1009    |
index 2d5b48b4260ae3f83df35a88c2e7e6ea334e44f1..81fc1b5c91ee1bd7035159ecdb77bd71696d5352 100644 (file)
 #define MSI_IOVA_LENGTH                        0x100000
 
 /* Until ACPICA headers cover IORT rev. C */
+#ifndef ACPI_IORT_SMMU_HISILICON_HI161X
+#define ACPI_IORT_SMMU_HISILICON_HI161X                0x1
+#endif
+
 #ifndef ACPI_IORT_SMMU_V3_CAVIUM_CN99XX
 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX                0x2
 #endif
@@ -2616,8 +2620,14 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu)
 #ifdef CONFIG_ACPI
 static void acpi_smmu_get_options(u32 model, struct arm_smmu_device *smmu)
 {
-       if (model == ACPI_IORT_SMMU_V3_CAVIUM_CN99XX)
+       switch (model) {
+       case ACPI_IORT_SMMU_V3_CAVIUM_CN99XX:
                smmu->options |= ARM_SMMU_OPT_PAGE0_REGS_ONLY;
+               break;
+       case ACPI_IORT_SMMU_HISILICON_HI161X:
+               smmu->options |= ARM_SMMU_OPT_SKIP_PREFETCH;
+               break;
+       }
 
        dev_notice(smmu->dev, "option mask 0x%x\n", smmu->options);
 }