PCI: fix incorrect mask of PM No_Soft_Reset bit
authorYu Zhao <yu.zhao@intel.com>
Wed, 25 Feb 2009 05:15:52 +0000 (13:15 +0800)
committerJesse Barnes <jbarnes@virtuousgeek.org>
Fri, 20 Mar 2009 17:48:08 +0000 (10:48 -0700)
Reviewed-by: Matthew Wilcox <matthew@wil.cx>
Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
include/linux/pci_regs.h

index 027815b4635e677ad441c73a19b0bf48a62f5243..b647a4df59fc77b2c1ce7de2700d65314722717b 100644 (file)
 #define  PCI_PM_CAP_PME_SHIFT  11      /* Start of the PME Mask in PMC */
 #define PCI_PM_CTRL            4       /* PM control and status register */
 #define  PCI_PM_CTRL_STATE_MASK        0x0003  /* Current power state (D0 to D3) */
-#define  PCI_PM_CTRL_NO_SOFT_RESET     0x0004  /* No reset for D3hot->D0 */
+#define  PCI_PM_CTRL_NO_SOFT_RESET     0x0008  /* No reset for D3hot->D0 */
 #define  PCI_PM_CTRL_PME_ENABLE        0x0100  /* PME pin enable */
 #define  PCI_PM_CTRL_DATA_SEL_MASK     0x1e00  /* Data select (??) */
 #define  PCI_PM_CTRL_DATA_SCALE_MASK   0x6000  /* Data scale (??) */