bcma: update pci configuration for bcm4706/bcm4716
authorNathan Hintz <nlhintz@hotmail.com>
Fri, 11 Jan 2013 06:24:03 +0000 (22:24 -0800)
committerJohn W. Linville <linville@tuxdriver.com>
Fri, 11 Jan 2013 19:50:00 +0000 (14:50 -0500)
Update the PCI configuration for BCM4706 and BCM4716 per the 2011
Broadcom SDK.

Signed-off-by: Nathan Hintz <nlhintz@hotmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/bcma/driver_pci_host.c
include/linux/bcma/bcma_driver_pci.h

index ef9f0938da77b7d1b92b14167631a54ffc9bfcb4..37d1777dcd47996709a2aae41b36bee7509c07df 100644 (file)
@@ -427,7 +427,7 @@ void __devinit bcma_core_pci_hostmode_init(struct bcma_drv_pci *pc)
        /* Reset RC */
        usleep_range(3000, 5000);
        pcicore_write32(pc, BCMA_CORE_PCI_CTL, BCMA_CORE_PCI_CTL_RST_OE);
-       usleep_range(1000, 2000);
+       msleep(50);
        pcicore_write32(pc, BCMA_CORE_PCI_CTL, BCMA_CORE_PCI_CTL_RST |
                        BCMA_CORE_PCI_CTL_RST_OE);
 
@@ -489,6 +489,17 @@ void __devinit bcma_core_pci_hostmode_init(struct bcma_drv_pci *pc)
 
        bcma_core_pci_enable_crs(pc);
 
+       if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4706 ||
+           bus->chipinfo.id == BCMA_CHIP_ID_BCM4716) {
+               u16 val16;
+               bcma_extpci_read_config(pc, 0, 0, BCMA_CORE_PCI_CFG_DEVCTRL,
+                                       &val16, sizeof(val16));
+               val16 |= (2 << 5);      /* Max payload size of 512 */
+               val16 |= (2 << 12);     /* MRRS 512 */
+               bcma_extpci_write_config(pc, 0, 0, BCMA_CORE_PCI_CFG_DEVCTRL,
+                                        &val16, sizeof(val16));
+       }
+
        /* Enable PCI bridge BAR0 memory & master access */
        tmp = PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
        bcma_extpci_write_config(pc, 0, 0, PCI_COMMAND, &tmp, sizeof(tmp));
index 41da581e1612a515157559aee5b5e90e23fccf50..31232247a1ee90db5fc1e0a13f7a9d39af8b4e53 100644 (file)
@@ -179,6 +179,8 @@ struct pci_dev;
 #define BCMA_CORE_PCI_CFG_FUN_MASK             7       /* Function mask */
 #define BCMA_CORE_PCI_CFG_OFF_MASK             0xfff   /* Register mask */
 
+#define BCMA_CORE_PCI_CFG_DEVCTRL              0xd8
+
 /* PCIE Root Capability Register bits (Host mode only) */
 #define BCMA_CORE_PCI_RC_CRS_VISIBILITY                0x0001