/*
* OMAP2/3 clockdomains
*
- * Copyright (C) 2008 Texas Instruments, Inc.
- * Copyright (C) 2008-2009 Nokia Corporation
+ * Copyright (C) 2008-2009 Texas Instruments, Inc.
+ * Copyright (C) 2008-2010 Nokia Corporation
*
* Written by Paul Walmsley and Jouni Högander
*
#endif /* CONFIG_ARCH_OMAP2430 */
-/* 34XX-specific possible dependencies */
+/* OMAP3-specific possible dependencies */
-#ifdef CONFIG_ARCH_OMAP34XX
+#ifdef CONFIG_ARCH_OMAP3
/* 3430: PM_WKDEP_PER: CORE, IVA2, MPU, WKUP */
static struct clkdm_dep per_wkdeps[] = {
};
/* 3430 PM_WKDEP_MPU: CORE, IVA2, DSS, PER */
-static struct clkdm_dep mpu_34xx_wkdeps[] = {
+static struct clkdm_dep mpu_3xxx_wkdeps[] = {
{
.clkdm_name = "core_l3_clkdm",
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
};
-/* Sleep dependency source arrays for 34xx-specific clkdms - 34XX only */
+/* Sleep dependency source arrays for OMAP3-specific clkdms */
/* 3430: CM_SLEEPDEP_DSS: MPU, IVA */
static struct clkdm_dep dss_sleepdeps[] = {
{ NULL },
};
-#endif /* CONFIG_ARCH_OMAP34XX */
+#endif /* CONFIG_ARCH_OMAP3 */
/*
* sys_clkout/sys_clkout2.
*/
-#if defined(CONFIG_ARCH_OMAP24XX) | defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
/* This is an implicit clockdomain - it is never defined as such in TRM */
static struct clockdomain wkup_clkdm = {
/*
- * 34xx clockdomains
+ * OMAP3 clockdomains
*/
-#if defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP3)
-static struct clockdomain mpu_34xx_clkdm = {
+static struct clockdomain mpu_3xxx_clkdm = {
.name = "mpu_clkdm",
.pwrdm = { .name = "mpu_pwrdm" },
.flags = CLKDM_CAN_HWSUP | CLKDM_CAN_FORCE_WAKEUP,
.clkstctrl_reg = OMAP34XX_CM_REGADDR(MPU_MOD, OMAP2_CM_CLKSTCTRL),
.dep_bit = OMAP3430_EN_MPU_SHIFT,
- .wkdep_srcs = mpu_34xx_wkdeps,
+ .wkdep_srcs = mpu_3xxx_wkdeps,
.clktrctrl_mask = OMAP3430_CLKTRCTRL_MPU_MASK,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
};
/*
* XXX add usecounting for clkdm dependencies, otherwise the presence
- * of a single dep bit for core_l3_34xx_clkdm and core_l4_34xx_clkdm
+ * of a single dep bit for core_l3_3xxx_clkdm and core_l4_3xxx_clkdm
* could cause trouble
*/
-static struct clockdomain core_l3_34xx_clkdm = {
+static struct clockdomain core_l3_3xxx_clkdm = {
.name = "core_l3_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.flags = CLKDM_CAN_HWSUP,
/*
* XXX add usecounting for clkdm dependencies, otherwise the presence
- * of a single dep bit for core_l3_34xx_clkdm and core_l4_34xx_clkdm
+ * of a single dep bit for core_l3_3xxx_clkdm and core_l4_3xxx_clkdm
* could cause trouble
*/
-static struct clockdomain core_l4_34xx_clkdm = {
+static struct clockdomain core_l4_3xxx_clkdm = {
.name = "core_l4_clkdm",
.pwrdm = { .name = "core_pwrdm" },
.flags = CLKDM_CAN_HWSUP,
};
/* Another case of bit name collisions between several registers: EN_DSS */
-static struct clockdomain dss_34xx_clkdm = {
+static struct clockdomain dss_3xxx_clkdm = {
.name = "dss_clkdm",
.pwrdm = { .name = "dss_pwrdm" },
.flags = CLKDM_CAN_HWSUP_SWSUP,
.omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
};
-#endif /* CONFIG_ARCH_OMAP34XX */
+#endif /* CONFIG_ARCH_OMAP3 */
#include "clockdomains44xx.h"
/*
- * Clockdomain hwsup dependencies (34XX only)
+ * Clockdomain hwsup dependencies (OMAP3 only)
*/
static struct clkdm_autodep clkdm_autodeps[] = {
static struct clockdomain *clockdomains_omap[] = {
-#if defined(CONFIG_ARCH_OMAP24XX) | defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
&wkup_clkdm,
&cm_clkdm,
&prm_clkdm,
&dss_2430_clkdm,
#endif
-#ifdef CONFIG_ARCH_OMAP34XX
- &mpu_34xx_clkdm,
+#ifdef CONFIG_ARCH_OMAP3
+ &mpu_3xxx_clkdm,
&neon_clkdm,
&iva2_clkdm,
&gfx_3430es1_clkdm,
&sgx_clkdm,
&d2d_clkdm,
- &core_l3_34xx_clkdm,
- &core_l4_34xx_clkdm,
- &dss_34xx_clkdm,
+ &core_l3_3xxx_clkdm,
+ &core_l4_3xxx_clkdm,
+ &dss_3xxx_clkdm,
&cam_clkdm,
&usbhost_clkdm,
&per_clkdm,
/*
* This file contains all of the powerdomains that have some element
- * of software control for the OMAP24xx and OMAP34XX chips.
+ * of software control for the OMAP24xx and OMAP34xx chips.
*
* This is not an exhaustive listing of powerdomains on the chips; only
* powerdomains that can be controlled in software.
/* OMAP2/3-common powerdomains */
-#if defined(CONFIG_ARCH_OMAP24XX) | defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
/*
* The GFX powerdomain is not present on 3430ES2, but currently we do not
/* As powerdomains are added or removed above, this list must also be changed */
static struct powerdomain *powerdomains_omap[] __initdata = {
-#if defined(CONFIG_ARCH_OMAP24XX) | defined(CONFIG_ARCH_OMAP34XX)
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
&wkup_omap2_pwrdm,
&gfx_omap2_pwrdm,
#endif
-#ifdef CONFIG_ARCH_OMAP24XX
+#ifdef CONFIG_ARCH_OMAP2
&dsp_pwrdm,
&mpu_24xx_pwrdm,
&core_24xx_pwrdm,
&mdm_pwrdm,
#endif
-#ifdef CONFIG_ARCH_OMAP34XX
+#ifdef CONFIG_ARCH_OMAP3
&iva2_pwrdm,
- &mpu_34xx_pwrdm,
+ &mpu_3xxx_pwrdm,
&neon_pwrdm,
- &core_34xx_pre_es3_1_pwrdm,
- &core_34xx_es3_1_pwrdm,
+ &core_3xxx_pre_es3_1_pwrdm,
+ &core_3xxx_es3_1_pwrdm,
&cam_pwrdm,
&dss_pwrdm,
&per_pwrdm,
/*
- * OMAP34XX powerdomain definitions
+ * OMAP3 powerdomain definitions
*
* Copyright (C) 2007-2008 Texas Instruments, Inc.
- * Copyright (C) 2007-2009 Nokia Corporation
+ * Copyright (C) 2007-2010 Nokia Corporation
*
* Written by Paul Walmsley
* Debugging and integration fixes by Jouni Högander
* 34XX-specific powerdomains, dependencies
*/
-#ifdef CONFIG_ARCH_OMAP34XX
+#ifdef CONFIG_ARCH_OMAP3
/*
* Powerdomains
},
};
-static struct powerdomain mpu_34xx_pwrdm = {
+static struct powerdomain mpu_3xxx_pwrdm = {
.name = "mpu_pwrdm",
.prcm_offs = MPU_MOD,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
},
};
-static struct powerdomain core_34xx_pre_es3_1_pwrdm = {
+static struct powerdomain core_3xxx_pre_es3_1_pwrdm = {
.name = "core_pwrdm",
.prcm_offs = CORE_MOD,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
},
};
-static struct powerdomain core_34xx_es3_1_pwrdm = {
+static struct powerdomain core_3xxx_es3_1_pwrdm = {
.name = "core_pwrdm",
.prcm_offs = CORE_MOD,
.omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES3_1),
};
-#endif /* CONFIG_ARCH_OMAP34XX */
+#endif /* CONFIG_ARCH_OMAP3 */
#endif