[RAMEN9610-10029][COMMON] media: mfc: use the real 10bit mem type

Even if pdata->P010_decoding is set, user can use the 8+2 format
using with s_fmt(ex: V4L2_PIX_FMT_NV12M_S10B).
Driver set the options according to real 10bit format
not project default 10bit format.

Change-Id: I52dc35ff02982d19978399f67bfb84dd2514ff5c
Signed-off-by: Ayoung Sim <a.sim@samsung.com>

diff --git a/drivers/media/platform/exynos/mfc/mfc_cmd.c b/drivers/media/platform/exynos/mfc/mfc_cmd.c
index f238595344f70c946524cee223c0f95a8503f387..9e1ddd2d1944217b1ddc96e80b0857a8cb48b245 100644 (file)
--- a/drivers/media/platform/exynos/mfc/mfc_cmd.c
+++ b/drivers/media/platform/exynos/mfc/mfc_cmd.c
@@ -226,7 +226,7 @@ void mfc_cmd_dec_seq_header(struct mfc_ctx *ctx)
                MFC_WRITEL(ctx->img_height, MFC_REG_D_SET_FRAME_HEIGHT);
        }
 
-       mfc_set_pixel_format(dev, ctx->dst_fmt->fourcc);
+       mfc_set_pixel_format(ctx, ctx->dst_fmt->fourcc);
 
        reg = 0;
        /* Enable realloc interface if SEI is enabled */

diff --git a/drivers/media/platform/exynos/mfc/mfc_data_struct.h b/drivers/media/platform/exynos/mfc/mfc_data_struct.h
index 5a2b015d7c8076ca0a22f170528c3b66c3d773f6..18141c210401d6e7b95ee47396dbd7185b655a2c 100644 (file)
--- a/drivers/media/platform/exynos/mfc/mfc_data_struct.h
+++ b/drivers/media/platform/exynos/mfc/mfc_data_struct.h
@@ -1514,6 +1514,7 @@ struct mfc_ctx {
 
        int batch_mode;
        bool check_dump;
+       bool mem_type_10bit;
 
        struct vb2_queue vq_src;
        struct vb2_queue vq_dst;

diff --git a/drivers/media/platform/exynos/mfc/mfc_enc_param.c b/drivers/media/platform/exynos/mfc/mfc_enc_param.c
index ddf79f4e8f26c3ab2ea9778fc02158af8e04ad0b..b409811d2c2b4b0a136884bcce28cc93ec76986d 100644 (file)
--- a/drivers/media/platform/exynos/mfc/mfc_enc_param.c
+++ b/drivers/media/platform/exynos/mfc/mfc_enc_param.c
@@ -198,7 +198,7 @@ static void __mfc_set_enc_params(struct mfc_ctx *ctx)
                mfc_set_bits(reg, 0x1, 18, 0x1);
        MFC_RAW_WRITEL(reg, MFC_REG_E_ENC_OPTIONS);
 
-       mfc_set_pixel_format(dev, ctx->src_fmt->fourcc);
+       mfc_set_pixel_format(ctx, ctx->src_fmt->fourcc);
 
        /* padding control & value */
        MFC_RAW_WRITEL(0x0, MFC_REG_E_PADDING_CTRL);

diff --git a/drivers/media/platform/exynos/mfc/mfc_qos.c b/drivers/media/platform/exynos/mfc/mfc_qos.c
index e4de71aa226a87ee551dccf762814b9884e107d8..f19ea64da43ae7fbad62d4d2abdd4f8e6c233a86 100644 (file)
--- a/drivers/media/platform/exynos/mfc/mfc_qos.c
+++ b/drivers/media/platform/exynos/mfc/mfc_qos.c
@@ -248,7 +248,6 @@ static void __mfc_qos_set(struct mfc_ctx *ctx, int i)
 static inline unsigned long __mfc_qos_get_weighted_mb(struct mfc_ctx *ctx,
                                                unsigned long mb)
 {
-       struct mfc_dev *dev = ctx->dev;
        struct mfc_enc *enc = ctx->enc_priv;
        struct mfc_dec *dec = ctx->dec_priv;
        struct mfc_enc_params *p;
@@ -294,7 +293,7 @@ static inline unsigned long __mfc_qos_get_weighted_mb(struct mfc_ctx *ctx,
                                weight = (weight * 100) / qos_weight->weight_422;
                                mfc_debug(3, "[QoS] 422foramt, weight: %d\n", weight / 10);
                        } else if (ctx->is_10bit) {
-                               if (!dev->pdata->P010_decoding && dec && dec->super64_bframe) {
+                               if (!ctx->mem_type_10bit && dec && dec->super64_bframe) {
                                        weight = (weight * 100) / qos_weight->weight_super64_bframe;
                                        mfc_debug(3, "[QoS] super64 B frame, weight: %d\n", weight / 10);
                                } else {

diff --git a/drivers/media/platform/exynos/mfc/mfc_reg_api.c b/drivers/media/platform/exynos/mfc/mfc_reg_api.c
index 651263127a4b08f6b840c3ad81c5c7c5308dd09a..68a5fa6d7cedcabcca37ada33fe0837833977c90 100644 (file)
--- a/drivers/media/platform/exynos/mfc/mfc_reg_api.c
+++ b/drivers/media/platform/exynos/mfc/mfc_reg_api.c
@@ -153,8 +153,8 @@ int mfc_set_dec_codec_buffers(struct mfc_ctx *ctx)
                reg |= (0x1 << MFC_REG_D_INIT_BUF_OPT_COPY_NOT_CODED_SHIFT);
                mfc_debug(2, "Notcoded frame copy mode start\n");
        }
-       /* Enable 10bit Dithering */
-       if (ctx->is_10bit && !dev->pdata->P010_decoding) {
+       /* Enable 10bit Dithering when only 8+2 10bit format */
+       if (ctx->is_10bit && !ctx->mem_type_10bit) {
                reg |= (0x1 << MFC_REG_D_INIT_BUF_OPT_DITHERING_EN_SHIFT);
                /* 64byte align, It is vaid only for VP9 */
                reg |= (0x1 << MFC_REG_D_INIT_BUF_OPT_STRIDE_SIZE_ALIGN);
@@ -456,13 +456,14 @@ int mfc_set_dynamic_dpb(struct mfc_ctx *ctx, struct mfc_buf *dst_mb)
        return 0;
 }
 
-void mfc_set_pixel_format(struct mfc_dev *dev, unsigned int format)
+void mfc_set_pixel_format(struct mfc_ctx *ctx, unsigned int format)
 {
+       struct mfc_dev *dev = ctx->dev;
        unsigned int reg = 0;
-       unsigned int pix_val, mem_type_10bit = 0;
+       unsigned int pix_val;
 
        if (dev->pdata->P010_decoding)
-               mem_type_10bit = 1;
+               ctx->mem_type_10bit = 1;
 
        switch (format) {
        case V4L2_PIX_FMT_NV12M:
@@ -486,22 +487,22 @@ void mfc_set_pixel_format(struct mfc_dev *dev, unsigned int format)
        case V4L2_PIX_FMT_NV12N_10B:
        case V4L2_PIX_FMT_NV12M_S10B:
        case V4L2_PIX_FMT_NV16M_S10B:
-               mem_type_10bit = 0;
+               ctx->mem_type_10bit = 0;
                pix_val = 0;
                break;
        case V4L2_PIX_FMT_NV12M_P010:
        case V4L2_PIX_FMT_NV16M_P210:
-               mem_type_10bit = 1;
+               ctx->mem_type_10bit = 1;
                pix_val = 0;
                break;
        case V4L2_PIX_FMT_NV21M_S10B:
        case V4L2_PIX_FMT_NV61M_S10B:
-               mem_type_10bit = 0;
+               ctx->mem_type_10bit = 0;
                pix_val = 1;
                break;
        case V4L2_PIX_FMT_NV21M_P010:
        case V4L2_PIX_FMT_NV61M_P210:
-               mem_type_10bit = 1;
+               ctx->mem_type_10bit = 1;
                pix_val = 1;
                break;
        default:
@@ -509,10 +510,10 @@ void mfc_set_pixel_format(struct mfc_dev *dev, unsigned int format)
                break;
        }
        reg |= pix_val;
-       reg |= (mem_type_10bit << 4);
+       reg |= (ctx->mem_type_10bit << 4);
        MFC_WRITEL(reg, MFC_REG_PIXEL_FORMAT);
        mfc_debug(2, "[FRAME] pixel format: %d, mem_type_10bit for 10bit: %d (reg: %#x)\n",
-                       pix_val, mem_type_10bit, reg);
+                       pix_val, ctx->mem_type_10bit, reg);
 }
 
 void mfc_print_hdr_plus_info(struct mfc_ctx *ctx, struct hdr10_plus_meta *sei_meta)

diff --git a/drivers/media/platform/exynos/mfc/mfc_reg_api.h b/drivers/media/platform/exynos/mfc/mfc_reg_api.h
index 30b2b46e53ed8f881dd9c531c78a0bc4fd8f3856..75788c6cd96448503d8fd9661fa99a69f96b6e1a 100644 (file)
--- a/drivers/media/platform/exynos/mfc/mfc_reg_api.h
+++ b/drivers/media/platform/exynos/mfc/mfc_reg_api.h
@@ -274,7 +274,7 @@ void mfc_set_enc_stride(struct mfc_ctx *ctx);
 
 int mfc_set_dynamic_dpb(struct mfc_ctx *ctx, struct mfc_buf *dst_vb);
 
-void mfc_set_pixel_format(struct mfc_dev *dev, unsigned int format);
+void mfc_set_pixel_format(struct mfc_ctx *ctx, unsigned int format);
 
 void mfc_print_hdr_plus_info(struct mfc_ctx *ctx, struct hdr10_plus_meta *sei_meta);
 void mfc_get_hdr_plus_info(struct mfc_ctx *ctx, struct hdr10_plus_meta *sei_meta);