arch, mm: convert all architectures to use 5level-fixup.h
authorKirill A. Shutemov <kirill.shutemov@linux.intel.com>
Thu, 9 Mar 2017 14:24:05 +0000 (17:24 +0300)
committerLinus Torvalds <torvalds@linux-foundation.org>
Thu, 9 Mar 2017 19:48:47 +0000 (11:48 -0800)
If an architecture uses 4level-fixup.h we don't need to do anything as
it includes 5level-fixup.h.

If an architecture uses pgtable-nop*d.h, define __ARCH_USE_5LEVEL_HACK
before inclusion of the header. It makes asm-generic code to use
5level-fixup.h.

If an architecture has 4-level paging or folds levels on its own,
include 5level-fixup.h directly.

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Acked-by: Michal Hocko <mhocko@suse.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
34 files changed:
arch/arc/include/asm/hugepage.h
arch/arc/include/asm/pgtable.h
arch/arm/include/asm/pgtable.h
arch/arm64/include/asm/pgtable-types.h
arch/avr32/include/asm/pgtable-2level.h
arch/cris/include/asm/pgtable.h
arch/frv/include/asm/pgtable.h
arch/h8300/include/asm/pgtable.h
arch/hexagon/include/asm/pgtable.h
arch/ia64/include/asm/pgtable.h
arch/metag/include/asm/pgtable.h
arch/microblaze/include/asm/page.h
arch/mips/include/asm/pgtable-32.h
arch/mips/include/asm/pgtable-64.h
arch/mn10300/include/asm/page.h
arch/nios2/include/asm/pgtable.h
arch/openrisc/include/asm/pgtable.h
arch/powerpc/include/asm/book3s/32/pgtable.h
arch/powerpc/include/asm/book3s/64/pgtable.h
arch/powerpc/include/asm/nohash/32/pgtable.h
arch/powerpc/include/asm/nohash/64/pgtable-4k.h
arch/powerpc/include/asm/nohash/64/pgtable-64k.h
arch/s390/include/asm/pgtable.h
arch/score/include/asm/pgtable.h
arch/sh/include/asm/pgtable-2level.h
arch/sh/include/asm/pgtable-3level.h
arch/sparc/include/asm/pgtable_64.h
arch/tile/include/asm/pgtable_32.h
arch/tile/include/asm/pgtable_64.h
arch/um/include/asm/pgtable-2level.h
arch/um/include/asm/pgtable-3level.h
arch/unicore32/include/asm/pgtable.h
arch/x86/include/asm/pgtable_types.h
arch/xtensa/include/asm/pgtable.h

index 317ff773e1ca5f4de6e7ab03dc1c9f184426a2d2..b18fcb6069082220b00790fbe6f7008d9d7aa570 100644 (file)
@@ -11,6 +11,7 @@
 #define _ASM_ARC_HUGEPAGE_H
 
 #include <linux/types.h>
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopmd.h>
 
 static inline pte_t pmd_pte(pmd_t pmd)
index e94ca72b974e7c7b31c2d631cb773ab3ad707b8d..ee22d40afef43b37dec7d93f0f1ee87060607f93 100644 (file)
@@ -37,6 +37,7 @@
 
 #include <asm/page.h>
 #include <asm/mmu.h>
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopmd.h>
 #include <linux/const.h>
 
index a8d656d9aec715f5ddcea1295c54923b82c49be9..1c462381c225eea31346ec4f19145e3fd449caab 100644 (file)
@@ -20,6 +20,7 @@
 
 #else
 
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopud.h>
 #include <asm/memory.h>
 #include <asm/pgtable-hwdef.h>
index 69b2fd41503ca3764fed84f9d404b2e32cbfc939..345a072b5856d41477fab1f450eda1e213d201d3 100644 (file)
@@ -55,9 +55,13 @@ typedef struct { pteval_t pgprot; } pgprot_t;
 #define __pgprot(x)    ((pgprot_t) { (x) } )
 
 #if CONFIG_PGTABLE_LEVELS == 2
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopmd.h>
 #elif CONFIG_PGTABLE_LEVELS == 3
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopud.h>
+#elif CONFIG_PGTABLE_LEVELS == 4
+#include <asm-generic/5level-fixup.h>
 #endif
 
 #endif /* __ASM_PGTABLE_TYPES_H */
index 425dd567b5b955424ef4f995ddf49decdf4637fd..d5b1c63993ec29620b9306e734cbd3e3ee66bd01 100644 (file)
@@ -8,6 +8,7 @@
 #ifndef __ASM_AVR32_PGTABLE_2LEVEL_H
 #define __ASM_AVR32_PGTABLE_2LEVEL_H
 
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopmd.h>
 
 /*
index 2a3210ba4c720485c4ac29de9c9fa3b69b136726..fa3a73004cc570b564e1c36a66c644f1d86f0c94 100644 (file)
@@ -6,6 +6,7 @@
 #define _CRIS_PGTABLE_H
 
 #include <asm/page.h>
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopmd.h>
 
 #ifndef __ASSEMBLY__
index a0513d463a1fa86d39e4af642f68e6f279b69f3a..ab6e7e961b545c30805d5dccae26ffa3782db4f2 100644 (file)
@@ -16,6 +16,7 @@
 #ifndef _ASM_PGTABLE_H
 #define _ASM_PGTABLE_H
 
+#include <asm-generic/5level-fixup.h>
 #include <asm/mem-layout.h>
 #include <asm/setup.h>
 #include <asm/processor.h>
index 8341db67821dd16ebefd70d2eb0e7b361b76a6ec..7d265d28ba5eecd2a6770c2dd161253b1a9a89b6 100644 (file)
@@ -1,5 +1,6 @@
 #ifndef _H8300_PGTABLE_H
 #define _H8300_PGTABLE_H
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopud.h>
 #include <asm-generic/pgtable.h>
 #define pgtable_cache_init()   do { } while (0)
index 49eab8136ec307d3dbcb40fd98676ccc9f2b44a8..24a9177fb897b6f72fab8ff4277e1af76814de2f 100644 (file)
@@ -26,6 +26,7 @@
  */
 #include <linux/swap.h>
 #include <asm/page.h>
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopmd.h>
 
 /* A handy thing to have if one has the RAM. Declared in head.S */
index 384794e665fc4a733b420d7ff73c38d6ab5bff8f..6cc22c8d8923e9c294f8736190b3e55e38e7698a 100644 (file)
@@ -587,8 +587,10 @@ extern struct page *zero_page_memmap_ptr;
 
 
 #if CONFIG_PGTABLE_LEVELS == 3
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopud.h>
 #endif
+#include <asm-generic/5level-fixup.h>
 #include <asm-generic/pgtable.h>
 
 #endif /* _ASM_IA64_PGTABLE_H */
index ffa3a3a2ecadda8bed7cf5e7b1508cd98c43abf8..0c151e5af079288aeebb8deb55994ec0106f5507 100644 (file)
@@ -6,6 +6,7 @@
 #define _METAG_PGTABLE_H
 
 #include <asm/pgtable-bits.h>
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopmd.h>
 
 /* Invalid regions on Meta: 0x00000000-0x001FFFFF and 0xFFFF0000-0xFFFFFFFF */
index fd850879854dff3f79a73effd5fc782e9bd203d8..d506bb0893f94e67288fdb8a4b700749873e921b 100644 (file)
@@ -95,7 +95,8 @@ typedef struct { unsigned long pgd; } pgd_t;
 #   else /* CONFIG_MMU */
 typedef struct { unsigned long ste[64]; }      pmd_t;
 typedef struct { pmd_t         pue[1]; }       pud_t;
-typedef struct { pud_t         pge[1]; }       pgd_t;
+typedef struct { pud_t         p4e[1]; }       p4d_t;
+typedef struct { p4d_t         pge[1]; }       pgd_t;
 #   endif /* CONFIG_MMU */
 
 # define pte_val(x)    ((x).pte)
index d21f3da7bdb619402a438b923fda454b7525d204..6f94bed571c4416b917a52fe364172243a3a9fe6 100644 (file)
@@ -16,6 +16,7 @@
 #include <asm/cachectl.h>
 #include <asm/fixmap.h>
 
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopmd.h>
 
 extern int temp_tlb_entry;
index 514cbc0a6a6760fd84d77c3760aa9ce2ac682fd5..130a2a6c153156bd311e6646bbfd3b92fc6f7228 100644 (file)
@@ -17,6 +17,7 @@
 #include <asm/cachectl.h>
 #include <asm/fixmap.h>
 
+#define __ARCH_USE_5LEVEL_HACK
 #if defined(CONFIG_PAGE_SIZE_64KB) && !defined(CONFIG_MIPS_VA_BITS_48)
 #include <asm-generic/pgtable-nopmd.h>
 #else
index 3810a6f740fdf67ffa6622fcf4706c1c841aa09a..dfe730a5ede04a0f3f22a877dd8cd4f42baa2652 100644 (file)
@@ -57,6 +57,7 @@ typedef struct page *pgtable_t;
 #define __pgd(x)       ((pgd_t) { (x) })
 #define __pgprot(x)    ((pgprot_t) { (x) })
 
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopmd.h>
 
 #endif /* !__ASSEMBLY__ */
index 298393c3cb426ffa7889589a637f342cae5b90e0..db4f7d179220782ab05e46ab46b02ffa09d4a998 100644 (file)
@@ -22,6 +22,7 @@
 #include <asm/tlbflush.h>
 
 #include <asm/pgtable-bits.h>
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopmd.h>
 
 #define FIRST_USER_ADDRESS     0UL
index 3567aa7be55504d7b838b2e13b3d62d7929096c1..ff97374ca0693d526582b8c34e7f9f421f43ed48 100644 (file)
@@ -25,6 +25,7 @@
 #ifndef __ASM_OPENRISC_PGTABLE_H
 #define __ASM_OPENRISC_PGTABLE_H
 
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopmd.h>
 
 #ifndef __ASSEMBLY__
index 012223638815569bb424e58021f3f9a7196ff0f0..26ed228d4dc6b7dd089fc84142dbc8af6adb31f2 100644 (file)
@@ -1,6 +1,7 @@
 #ifndef _ASM_POWERPC_BOOK3S_32_PGTABLE_H
 #define _ASM_POWERPC_BOOK3S_32_PGTABLE_H
 
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopmd.h>
 
 #include <asm/book3s/32/hash.h>
index 1eeeb72c70158aa07775444e2fe160e4ef15223b..13c39b6d5d64cb2ed3511861782d2184ed74c0c2 100644 (file)
@@ -1,9 +1,12 @@
 #ifndef _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
 #define _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
 
+#include <asm-generic/5level-fixup.h>
+
 #ifndef __ASSEMBLY__
 #include <linux/mmdebug.h>
 #endif
+
 /*
  * Common bits between hash and Radix page table
  */
index ba9921bf202e0c7f2d8579dfc6f31f25ad7cebd7..5134ade2e850162c70d288c1b293b38a7aae6a1c 100644 (file)
@@ -1,6 +1,7 @@
 #ifndef _ASM_POWERPC_NOHASH_32_PGTABLE_H
 #define _ASM_POWERPC_NOHASH_32_PGTABLE_H
 
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopmd.h>
 
 #ifndef __ASSEMBLY__
index d0db98793dd83d0ddf5e8d60be2688e697e74491..9f4de0a1035efb3e6d615a86f6cab1e29362d339 100644 (file)
@@ -1,5 +1,8 @@
 #ifndef _ASM_POWERPC_NOHASH_64_PGTABLE_4K_H
 #define _ASM_POWERPC_NOHASH_64_PGTABLE_4K_H
+
+#include <asm-generic/5level-fixup.h>
+
 /*
  * Entries per page directory level.  The PTE level must use a 64b record
  * for each page table entry.  The PMD and PGD level use a 32b record for
index 55b28ef3409af5494a521b8a948966947555a84d..1facb584dd2962faf8ff334b9ca90e2840ee6d1a 100644 (file)
@@ -1,6 +1,7 @@
 #ifndef _ASM_POWERPC_NOHASH_64_PGTABLE_64K_H
 #define _ASM_POWERPC_NOHASH_64_PGTABLE_64K_H
 
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopud.h>
 
 
index 7ed1972b1920eb45e8544f5b495db75bafa20636..93e37b12e88237766821369e19827e5e2d844a1b 100644 (file)
@@ -24,6 +24,7 @@
  * the S390 page table tree.
  */
 #ifndef __ASSEMBLY__
+#include <asm-generic/5level-fixup.h>
 #include <linux/sched.h>
 #include <linux/mm_types.h>
 #include <linux/page-flags.h>
index 0553e5cd5985a0a634864a3402a889491a52da91..46ff8fd678a75cd1cf28111961ffec22375be6ac 100644 (file)
@@ -2,6 +2,7 @@
 #define _ASM_SCORE_PGTABLE_H
 
 #include <linux/const.h>
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopmd.h>
 
 #include <asm/fixmap.h>
index 19bd89db17e71749b1e7bb07355e2152e4c92408..f75cf438725766d2b7340f38ce74f1ea63f0690e 100644 (file)
@@ -1,6 +1,7 @@
 #ifndef __ASM_SH_PGTABLE_2LEVEL_H
 #define __ASM_SH_PGTABLE_2LEVEL_H
 
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopmd.h>
 
 /*
index 249a985d96482e54bb604daaf129552ba8835257..9b1e776eca31bec7ea936633528011e48b6374ba 100644 (file)
@@ -1,6 +1,7 @@
 #ifndef __ASM_SH_PGTABLE_3LEVEL_H
 #define __ASM_SH_PGTABLE_3LEVEL_H
 
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopud.h>
 
 /*
index 56e49c8f770d6b620eb5811101d8548eb80d5850..8a598528ec1f0455508c1389982e832460c12b81 100644 (file)
@@ -12,6 +12,7 @@
  * the SpitFire page tables.
  */
 
+#include <asm-generic/5level-fixup.h>
 #include <linux/compiler.h>
 #include <linux/const.h>
 #include <asm/types.h>
index d26a42279036837b760ea4b93593b45fe4394f83..5f8c615cb5e9bda9a3c1ef6028e553d5e54c3615 100644 (file)
@@ -74,6 +74,7 @@ extern unsigned long VMALLOC_RESERVE /* = CONFIG_VMALLOC_RESERVE */;
 #define MAXMEM         (_VMALLOC_START - PAGE_OFFSET)
 
 /* We have no pmd or pud since we are strictly a two-level page table */
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopmd.h>
 
 static inline int pud_huge_page(pud_t pud)     { return 0; }
index e96cec52f6d8aa86c0f9a89fccf4d1081db98f56..96fe58b451188a3f3a31d560036ff3031823f05b 100644 (file)
@@ -59,6 +59,7 @@
 #ifndef __ASSEMBLY__
 
 /* We have no pud since we are a three-level page table. */
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopud.h>
 
 /*
index cfbe597524698c9234effb606aadd9ff74299085..179c0ea87a0c3b48e93821d2d1158259c0454b1b 100644 (file)
@@ -8,6 +8,7 @@
 #ifndef __UM_PGTABLE_2LEVEL_H
 #define __UM_PGTABLE_2LEVEL_H
 
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopmd.h>
 
 /* PGDIR_SHIFT determines what a third-level page table entry can map */
index bae8523a162fd3b80067260ddfad400bdf480e5b..c4d876dfb9acd14bc11ff6b4230bbff5bbe070fe 100644 (file)
@@ -7,6 +7,7 @@
 #ifndef __UM_PGTABLE_3LEVEL_H
 #define __UM_PGTABLE_3LEVEL_H
 
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopud.h>
 
 /* PGDIR_SHIFT determines what a third-level page table entry can map */
index 818d0f5598e3247666de004a1ff004abc5fd23cf..a4f2bef37e70697f215e916118775da8dbc4aad6 100644 (file)
@@ -12,6 +12,7 @@
 #ifndef __UNICORE_PGTABLE_H__
 #define __UNICORE_PGTABLE_H__
 
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopmd.h>
 #include <asm/cpu-single.h>
 
index 8b4de22d64299e8997e8b12270e5c23112f85597..62484333673d98c251d52d1eccc10e762b38478b 100644 (file)
@@ -273,6 +273,8 @@ static inline pgdval_t pgd_flags(pgd_t pgd)
 }
 
 #if CONFIG_PGTABLE_LEVELS > 3
+#include <asm-generic/5level-fixup.h>
+
 typedef struct { pudval_t pud; } pud_t;
 
 static inline pud_t native_make_pud(pmdval_t val)
@@ -285,6 +287,7 @@ static inline pudval_t native_pud_val(pud_t pud)
        return pud.pud;
 }
 #else
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopud.h>
 
 static inline pudval_t native_pud_val(pud_t pud)
@@ -306,6 +309,7 @@ static inline pmdval_t native_pmd_val(pmd_t pmd)
        return pmd.pmd;
 }
 #else
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopmd.h>
 
 static inline pmdval_t native_pmd_val(pmd_t pmd)
index 8aa0e0d9cbb21f0c3703192a828dbbeaf4d475ca..30dd5b2e4ad5af403bdf794e57a58b1c3beef2e7 100644 (file)
@@ -11,6 +11,7 @@
 #ifndef _XTENSA_PGTABLE_H
 #define _XTENSA_PGTABLE_H
 
+#define __ARCH_USE_5LEVEL_HACK
 #include <asm-generic/pgtable-nopmd.h>
 #include <asm/page.h>
 #include <asm/kmem_layout.h>