i2c: i801: Add support for Intel Gemini Lake
authorMika Westerberg <mika.westerberg@linux.intel.com>
Wed, 1 Feb 2017 16:20:59 +0000 (19:20 +0300)
committerWolfram Sang <wsa@the-dreams.de>
Thu, 9 Feb 2017 16:39:16 +0000 (17:39 +0100)
Intel Gemini Lake has the same SMBus host controller than Intel Broxton.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Documentation/i2c/busses/i2c-i801
drivers/i2c/busses/Kconfig
drivers/i2c/busses/i2c-i801.c

index 1bba38dd263727cac57958e8f26a6ca75092c5e8..820d9040de1640865e6246f6dba6f758abb8e088 100644 (file)
@@ -33,6 +33,7 @@ Supported adapters:
   * Intel DNV (SOC)
   * Intel Broxton (SOC)
   * Intel Lewisburg (PCH)
+  * Intel Gemini Lake (SOC)
    Datasheets: Publicly available at the Intel website
 
 On Intel Patsburg and later chipsets, both the normal host SMBus controller
index 271920847bca30af1a862314c89354ca5add59f6..c64221d143ffcdbe7adc6c2916b3cd6a26c3efbd 100644 (file)
@@ -128,6 +128,7 @@ config I2C_I801
            DNV (SOC)
            Broxton (SOC)
            Lewisburg (PCH)
+           Gemini Lake (SOC)
 
          This driver can also be built as a module.  If so, the module
          will be called i2c-i801.
index e242db43774bb68fd91ce4a45a3ac73217ce2d7d..6484fa6dbb84a35df7d90df5b595ac5db74ea099 100644 (file)
@@ -65,6 +65,7 @@
  * Lewisburg (PCH)             0xa1a3  32      hard    yes     yes     yes
  * Lewisburg Supersku (PCH)    0xa223  32      hard    yes     yes     yes
  * Kaby Lake PCH-H (PCH)       0xa2a3  32      hard    yes     yes     yes
+ * Gemini Lake (SOC)           0x31d4  32      hard    yes     yes     yes
  *
  * Features supported by this driver:
  * Software PEC                                no
 #define PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS             0x2292
 #define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS             0x2330
 #define PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS          0x23b0
+#define PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS           0x31d4
 #define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS                0x3b30
 #define PCI_DEVICE_ID_INTEL_BROXTON_SMBUS              0x5ad4
 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS            0x8c22
@@ -1012,6 +1014,7 @@ static const struct pci_device_id i801_ids[] = {
        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1) },
        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2) },
        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS) },
+       { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS) },
        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS) },
        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS) },
        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS) },