ARM: at91: dts: set #dma-cells to the correct value
authorLudovic Desroches <ludovic.desroches@atmel.com>
Tue, 16 Apr 2013 13:03:06 +0000 (15:03 +0200)
committerNicolas Ferre <nicolas.ferre@atmel.com>
Thu, 18 Apr 2013 15:06:10 +0000 (17:06 +0200)
Moving to generic DMA DT binding involves to set #dma-cells to 2.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
arch/arm/boot/dts/at91sam9g45.dtsi
arch/arm/boot/dts/at91sam9n12.dtsi
arch/arm/boot/dts/at91sam9x5.dtsi
arch/arm/boot/dts/sama5d3.dtsi

index 6b1d4cab24c2a9e62537515991f109287dbc0091..275e76801b706807198019ad9fa22249a73c4543 100644 (file)
                                compatible = "atmel,at91sam9g45-dma";
                                reg = <0xffffec00 0x200>;
                                interrupts = <21 4 0>;
+                               #dma-cells = <2>;
                        };
 
                        pinctrl@fffff200 {
index 7750f98dd7646a5e188300c012cbba6741b967d1..acc45261e77ebff0d5c58f3c17eaf64f7b13cc03 100644 (file)
                                compatible = "atmel,at91sam9g45-dma";
                                reg = <0xffffec00 0x200>;
                                interrupts = <20 4 0>;
+                               #dma-cells = <2>;
                        };
 
                        pinctrl@fffff400 {
index aa98e641931fa21ed76c627229da576289005d12..745a31daf4f378ccf246d8d44c0dce0223b81621 100644 (file)
                                compatible = "atmel,at91sam9g45-dma";
                                reg = <0xffffec00 0x200>;
                                interrupts = <20 4 0>;
+                               #dma-cells = <2>;
                        };
 
                        dma1: dma-controller@ffffee00 {
                                compatible = "atmel,at91sam9g45-dma";
                                reg = <0xffffee00 0x200>;
                                interrupts = <21 4 0>;
+                               #dma-cells = <2>;
                        };
 
                        pinctrl@fffff400 {
index 39b0458d365abc52cf19f0ff661e201e902e467a..95c00a3ae9257dc85d05418485ad03c2d46c2928 100644 (file)
                                compatible = "atmel,at91sam9g45-dma";
                                reg = <0xffffe600 0x200>;
                                interrupts = <30 4 0>;
-                               #dma-cells = <1>;
+                               #dma-cells = <2>;
                        };
 
                        dma1: dma-controller@ffffe800 {
                                compatible = "atmel,at91sam9g45-dma";
                                reg = <0xffffe800 0x200>;
                                interrupts = <31 4 0>;
-                               #dma-cells = <1>;
+                               #dma-cells = <2>;
                        };
 
                        ramc0: ramc@ffffea00 {