(pid == SILICOM_PE2G4BPFi35ZX_SSID))
#define PEGF80_IF_SERIES(pid) \
-((pid==SILICOM_PE2G4BPFi80_SSID)|| \
-(pid==SILICOM_PE2G4BPFi80LX_SSID)|| \
-(pid==SILICOM_PE2G4BPFi80ZX_SSID)|| \
-(pid==SILICOM_PE2G4BPFi80ZX_SSID)|| \
-(pid==SILICOM_M1E2G4BPFi80_SSID)|| \
-(pid==SILICOM_M1E2G4BPFi80LX_SSID)|| \
-(pid==SILICOM_M1E2G4BPFi80ZX_SSID)|| \
-(pid==SILICOM_PE2G2BPFi80_SSID)|| \
-(pid==SILICOM_PE2G2BPFi80LX_SSID)|| \
-(pid==SILICOM_PE2G2BPFi80ZX_SSID)|| \
-(pid==SILICOM_PE2G2BPFi35_SSID)|| \
-(pid==SILICOM_PE2G2BPFi35LX_SSID)|| \
-(pid==SILICOM_PE2G2BPFi35ZX_SSID)|| \
-(pid==SILICOM_PE2G4BPFi35_SSID)|| \
-(pid==SILICOM_PE2G4BPFi35LX_SSID)|| \
-(pid==SILICOM_PE2G4BPFi35ZX_SSID))
+ ((pid == SILICOM_PE2G4BPFi80_SSID) || \
+ (pid == SILICOM_PE2G4BPFi80LX_SSID) || \
+ (pid == SILICOM_PE2G4BPFi80ZX_SSID) || \
+ (pid == SILICOM_PE2G4BPFi80ZX_SSID) || \
+ (pid == SILICOM_M1E2G4BPFi80_SSID) || \
+ (pid == SILICOM_M1E2G4BPFi80LX_SSID) || \
+ (pid == SILICOM_M1E2G4BPFi80ZX_SSID) || \
+ (pid == SILICOM_PE2G2BPFi80_SSID) || \
+ (pid == SILICOM_PE2G2BPFi80LX_SSID) || \
+ (pid == SILICOM_PE2G2BPFi80ZX_SSID) || \
+ (pid == SILICOM_PE2G2BPFi35_SSID) || \
+ (pid == SILICOM_PE2G2BPFi35LX_SSID) || \
+ (pid == SILICOM_PE2G2BPFi35ZX_SSID) || \
+ (pid == SILICOM_PE2G4BPFi35_SSID) || \
+ (pid == SILICOM_PE2G4BPFi35LX_SSID) || \
+ (pid == SILICOM_PE2G4BPFi35ZX_SSID))
#define BP10G9_IF_SERIES(pid) \
((pid==INTEL_PE210G2SPI9_SSID)|| \