drm/i915: Move the magical deferred context allocation into the request
authorChris Wilson <chris@chris-wilson.co.uk>
Thu, 28 Apr 2016 08:56:54 +0000 (09:56 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Thu, 28 Apr 2016 11:17:32 +0000 (12:17 +0100)
We can hide more details of execlists from higher level code by removing
the explicit call to create an execlist context from execbuffer and
into its first use by execlists.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1461833819-3991-20-git-send-email-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/i915_gem_execbuffer.c
drivers/gpu/drm/i915/intel_lrc.c
drivers/gpu/drm/i915/intel_lrc.h

index 6f4f2a6cdf93640e8bdf05d487f354aa0174c676..e0ee5d1ac372c8e3c4d02fa3c6f96a82e9a8d542 100644 (file)
@@ -1085,14 +1085,6 @@ i915_gem_validate_context(struct drm_device *dev, struct drm_file *file,
                return ERR_PTR(-EIO);
        }
 
-       if (i915.enable_execlists && !ctx->engine[engine->id].state) {
-               int ret = intel_lr_context_deferred_alloc(ctx, engine);
-               if (ret) {
-                       DRM_DEBUG("Could not create LRC %u: %d\n", ctx_id, ret);
-                       return ERR_PTR(ret);
-               }
-       }
-
        return ctx;
 }
 
index ccfa7b8d67ee0680afeed38a516197c43028ae65..3ab5caa8c165ce1b23b123f3c364761e3118fa89 100644 (file)
@@ -228,6 +228,8 @@ enum {
 #define GEN8_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT       0x17
 #define GEN9_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT       0x26
 
+static int execlists_context_deferred_alloc(struct intel_context *ctx,
+                                           struct intel_engine_cs *engine);
 static int intel_lr_context_pin(struct intel_context *ctx,
                                struct intel_engine_cs *engine);
 
@@ -685,6 +687,12 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request
         */
        request->reserved_space += MIN_SPACE_FOR_ADD_REQUEST;
 
+       if (request->ctx->engine[engine->id].state == NULL) {
+               ret = execlists_context_deferred_alloc(request->ctx, engine);
+               if (ret)
+                       return ret;
+       }
+
        request->ringbuf = request->ctx->engine[engine->id].ringbuf;
 
        if (i915.enable_guc_submission) {
@@ -2008,7 +2016,7 @@ logical_ring_init(struct drm_device *dev, struct intel_engine_cs *engine)
        if (ret)
                goto error;
 
-       ret = intel_lr_context_deferred_alloc(dctx, engine);
+       ret = execlists_context_deferred_alloc(dctx, engine);
        if (ret)
                goto error;
 
@@ -2482,9 +2490,9 @@ uint32_t intel_lr_context_size(struct intel_engine_cs *engine)
 }
 
 /**
- * intel_lr_context_deferred_alloc() - create the LRC specific bits of a context
+ * execlists_context_deferred_alloc() - create the LRC specific bits of a context
  * @ctx: LR context to create.
- * @ring: engine to be used with the context.
+ * @engine: engine to be used with the context.
  *
  * This function can be called more than once, with different engines, if we plan
  * to use the context with them. The context backing objects and the ringbuffers
@@ -2494,9 +2502,8 @@ uint32_t intel_lr_context_size(struct intel_engine_cs *engine)
  *
  * Return: non-zero on error.
  */
-
-int intel_lr_context_deferred_alloc(struct intel_context *ctx,
-                                   struct intel_engine_cs *engine)
+static int execlists_context_deferred_alloc(struct intel_context *ctx,
+                                           struct intel_engine_cs *engine)
 {
        struct drm_device *dev = engine->dev;
        struct drm_i915_gem_object *ctx_obj;
index 9510826f0d900b4a6e3bebdb0179c3a1c3a20af5..28ff324ba5dc8ac3b79621c55b8b2d8f8f8019b5 100644 (file)
@@ -101,8 +101,6 @@ static inline void intel_logical_ring_emit_reg(struct intel_ringbuffer *ringbuf,
 
 void intel_lr_context_free(struct intel_context *ctx);
 uint32_t intel_lr_context_size(struct intel_engine_cs *engine);
-int intel_lr_context_deferred_alloc(struct intel_context *ctx,
-                                   struct intel_engine_cs *engine);
 void intel_lr_context_unpin(struct intel_context *ctx,
                            struct intel_engine_cs *engine);