#include <linux/mca-legacy.h>
#include <linux/ethtool.h>
#include <linux/bitops.h>
+#include <linux/jiffies.h>
#include <asm/uaccess.h>
#include <asm/processor.h>
s = jiffies; /* warning: only active with interrupts on !! */
while (!(cfg_cmd->cmd_status & STAT_COMPL)) {
- if (jiffies - s > 30*HZ/100)
+ if (time_after(jiffies, s + 30*HZ/100))
break;
}
s = jiffies;
while (!(ias_cmd->cmd_status & STAT_COMPL)) {
- if (jiffies - s > 30*HZ/100)
+ if (time_after(jiffies, s + 30*HZ/100))
break;
}
s = jiffies;
while (!(tdr_cmd->cmd_status & STAT_COMPL)) {
- if (jiffies - s > 30*HZ/100) {
+ if (time_after(jiffies, s + 30*HZ/100)) {
printk(KERN_WARNING "%s: %d Problems while running the TDR.\n", dev->name, __LINE__);
result = 1;
break;
elmc_id_attn586();
s = jiffies;
while (!(mc_cmd->cmd_status & STAT_COMPL)) {
- if (jiffies - s > 30*HZ/100)
+ if (time_after(jiffies, s + 30*HZ/100))
break;
}
if (!(mc_cmd->cmd_status & STAT_COMPL)) {
#include <linux/highmem.h>
#include <linux/eisa.h>
#include <linux/bitops.h>
+#include <linux/jiffies.h>
#include <asm/irq.h> /* For NR_IRQS only. */
#include <asm/io.h>
#include <asm/uaccess.h>
skb = dev_alloc_skb(PKT_BUF_SZ);
if (skb == NULL) {
static unsigned long last_jif;
- if ((jiffies - last_jif) > 10 * HZ) {
+ if (time_after(jiffies, last_jif + 10 * HZ)) {
printk(KERN_WARNING "%s: memory shortage\n", dev->name);
last_jif = jiffies;
}
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
+#include <linux/jiffies.h>
#include <asm/system.h>
#include <asm/io.h>
outb(inb(ioaddr + NE_RESET), ioaddr + NE_RESET);
while ((inb(ioaddr + NE_EN0_ISR) & ENISR_RESET) == 0)
- if (jiffies - reset_start_time > 2*HZ/100) {
+ if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
printk(" not found (no reset ack).\n");
return -ENODEV;
}
/* This check _should_not_ be necessary, omit eventually. */
while ((inb(NE_BASE+NE_EN0_ISR) & ENISR_RESET) == 0)
- if (jiffies - reset_start_time > 2*HZ/100) {
+ if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
printk("%s: ne_reset_8390() did not complete.\n", dev->name);
break;
}
dma_start = jiffies;
while ((inb(NE_BASE + NE_EN0_ISR) & ENISR_RDC) == 0)
- if (jiffies - dma_start > 2*HZ/100) { /* 20ms */
+ if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */
printk("%s: timeout waiting for Tx RDC.\n", dev->name);
apne_reset_8390(dev);
NS8390_init(dev,1);
static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,
int bufnum);
-struct ArcProto rawmode_proto =
+static struct ArcProto rawmode_proto =
{
.suffix = 'r',
.mtu = XMTU,
#include <net/arp.h>
#include <linux/init.h>
#include <linux/arcdevice.h>
+#include <linux/jiffies.h>
/* "do nothing" functions for protocol drivers */
static void null_rx(struct net_device *dev, int bufnum,
static int null_prepare_tx(struct net_device *dev, struct archdr *pkt,
int length, int bufnum);
+static void arcnet_rx(struct net_device *dev, int bufnum);
/*
* one ArcProto per possible proto ID. None of the elements of
struct ArcProto *arc_proto_map[256], *arc_proto_default,
*arc_bcast_proto, *arc_raw_proto;
-struct ArcProto arc_proto_null =
+static struct ArcProto arc_proto_null =
{
.suffix = '?',
.mtu = XMTU,
EXPORT_SYMBOL(arc_proto_default);
EXPORT_SYMBOL(arc_bcast_proto);
EXPORT_SYMBOL(arc_raw_proto);
-EXPORT_SYMBOL(arc_proto_null);
EXPORT_SYMBOL(arcnet_unregister_proto);
EXPORT_SYMBOL(arcnet_debug);
EXPORT_SYMBOL(alloc_arcdev);
arcnet_debug = debug;
- printk(VERSION);
+ printk("arcnet loaded.\n");
#ifdef ALPHA_WARNING
BUGLVL(D_EXTRA) {
* Dump the contents of an ARCnet buffer
*/
#if (ARCNET_DEBUG_MAX & (D_RX | D_TX))
-void arcnet_dump_packet(struct net_device *dev, int bufnum, char *desc,
- int take_arcnet_lock)
+static void arcnet_dump_packet(struct net_device *dev, int bufnum,
+ char *desc, int take_arcnet_lock)
{
struct arcnet_local *lp = dev->priv;
int i, length;
}
-EXPORT_SYMBOL(arcnet_dump_packet);
+#else
+
+#define arcnet_dump_packet(dev, bufnum, desc,take_arcnet_lock) do { } while (0)
+
#endif
spin_unlock_irqrestore(&lp->lock, flags);
- if (jiffies - lp->last_timeout > 10*HZ) {
+ if (time_after(jiffies, lp->last_timeout + 10*HZ)) {
BUGMSG(D_EXTRA, "tx timed out%s (status=%Xh, intmask=%Xh, dest=%02Xh)\n",
msg, status, lp->intmask, lp->lasttrans_dest);
lp->last_timeout = jiffies;
* This is a generic packet receiver that calls arcnet??_rx depending on the
* protocol ID found.
*/
-void arcnet_rx(struct net_device *dev, int bufnum)
+static void arcnet_rx(struct net_device *dev, int bufnum)
{
struct arcnet_local *lp = dev->priv;
struct archdr pkt;
int bufnum);
-struct ArcProto rfc1051_proto =
+static struct ArcProto rfc1051_proto =
{
.suffix = 's',
.mtu = XMTU - RFC1051_HDR_SIZE,
int bufnum);
static int continue_tx(struct net_device *dev, int bufnum);
-struct ArcProto rfc1201_proto =
+static struct ArcProto rfc1201_proto =
{
.suffix = 'a',
.mtu = 1500, /* could be more, but some receivers can't handle it... */
#include <linux/device.h>
#include <linux/init.h>
#include <linux/bitops.h>
+#include <linux/jiffies.h>
#include <asm/system.h>
#include <asm/ecard.h>
dma_start = jiffies;
while ((readb (addr + EN0_ISR) & ENISR_RDC) == 0)
- if (jiffies - dma_start > 2*HZ/100) { /* 20ms */
+ if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */
printk(KERN_ERR "%s: timeout waiting for TX RDC\n",
dev->name);
etherh_reset (dev);
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/bitops.h>
+#include <linux/jiffies.h>
#include <asm/system.h>
#include <asm/io.h>
static int eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l)
{
- int starttime;
+ unsigned long starttime;
outb(0xff, ioaddr + TX_STATUS_REG);
outb(TX_START | 1, ioaddr + TRANSMIT_START_REG);
while( (inb(ioaddr + TX_STATUS_REG) & 0x80) == 0) {
- if( (jiffies - starttime) > TX_TIMEOUT) {
+ if( time_after(jiffies, starttime + TX_TIMEOUT)) {
return -1;
}
}
static int eth16i_receive_probe_packet(int ioaddr)
{
- int starttime;
+ unsigned long starttime;
starttime = jiffies;
while((inb(ioaddr + TX_STATUS_REG) & 0x20) == 0) {
- if( (jiffies - starttime) > TX_TIMEOUT) {
+ if( time_after(jiffies, starttime + TX_TIMEOUT)) {
if(eth16i_debug > 1)
printk(KERN_DEBUG "Timeout occurred waiting transmit packet received\n");
starttime = jiffies;
while((inb(ioaddr + RX_STATUS_REG) & 0x80) == 0) {
- if( (jiffies - starttime) > TX_TIMEOUT) {
+ if( time_after(jiffies, starttime + TX_TIMEOUT)) {
if(eth16i_debug > 1)
printk(KERN_DEBUG "Timeout occurred waiting receive packet\n");
return -1;
/* autoprobe baud rate */
tstart = jiffies;
i = 0;
- while ((signed)(jiffies-tstart-HZ/3) < 0) {
+ while (time_before(jiffies, tstart + HZ/3)) {
if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
goto epptimeout;
if ((stat & (EPP_NRAEF|EPP_NRHF)) == EPP_NRHF) {
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/bitops.h>
+#include <linux/jiffies.h>
#include <asm/io.h>
printk("hp100: %s: start_xmit_bm: No TX PDL available.\n", dev->name);
#endif
/* not waited long enough since last tx? */
- if (jiffies - dev->trans_start < HZ)
+ if (time_before(jiffies, dev->trans_start + HZ))
return -EAGAIN;
if (hp100_check_lan(dev))
printk("hp100: %s: start_xmit: tx free mem = 0x%x\n", dev->name, i);
#endif
/* not waited long enough since last failed tx try? */
- if (jiffies - dev->trans_start < HZ) {
+ if (time_before(jiffies, dev->trans_start + HZ)) {
#ifdef HP100_DEBUG
printk("hp100: %s: trans_start timing problem\n",
dev->name);
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
+#include <linux/jiffies.h>
#include <asm/system.h>
#include <asm/io.h>
/* This check _should_not_ be necessary, omit eventually. */
while ((inb_p(NE_BASE+EN0_ISR) & ENISR_RESET) == 0)
- if (jiffies - reset_start_time > 2*HZ/100) {
+ if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
printk(KERN_WARNING "%s: ne_reset_8390() did not complete.\n", dev->name);
break;
}
#endif
while ((inb_p(NE_BASE + EN0_ISR) & ENISR_RDC) == 0)
- if (jiffies - dma_start > 2*HZ/100) { /* 20ms */
+ if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */
printk(KERN_WARNING "%s: timeout waiting for Tx RDC.\n", dev->name);
ne_reset_8390(dev);
NS8390_init(dev,1);
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
+#include <linux/jiffies.h>
#include <asm/system.h>
#include <asm/io.h>
outb(inb(ioaddr + NE_RESET), ioaddr + NE_RESET);
while ((inb_p(ioaddr + EN0_ISR) & ENISR_RESET) == 0)
- if (jiffies - reset_start_time > 2*HZ/100) {
+ if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
if (bad_card) {
printk(" (warning: no reset ack)");
break;
/* This check _should_not_ be necessary, omit eventually. */
while ((inb_p(NE_BASE+EN0_ISR) & ENISR_RESET) == 0)
- if (jiffies - reset_start_time > 2*HZ/100) {
+ if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
printk(KERN_WARNING "%s: ne_reset_8390() did not complete.\n", dev->name);
break;
}
#endif
while ((inb_p(nic_base + EN0_ISR) & ENISR_RDC) == 0)
- if (jiffies - dma_start > 2*HZ/100) { /* 20ms */
+ if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */
printk(KERN_WARNING "%s: timeout waiting for Tx RDC.\n", dev->name);
ne_reset_8390(dev);
NS8390_init(dev,1);
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/bitops.h>
+#include <linux/jiffies.h>
#include <asm/system.h>
#include <asm/io.h>
outb(inb(base_addr + NE_RESET), base_addr + NE_RESET);
while ((inb_p(base_addr + EN0_ISR) & ENISR_RESET) == 0)
- if (jiffies - reset_start_time > 2*HZ/100) {
+ if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
printk(" not found (no reset ack).\n");
retval = -ENODEV;
goto out;
/* This check _should_not_ be necessary, omit eventually. */
while ((inb_p(NE_BASE+EN0_ISR) & ENISR_RESET) == 0)
- if (jiffies - reset_start_time > 2*HZ/100) {
+ if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
printk("%s: ne_reset_8390() did not complete.\n",
dev->name);
break;
#endif
while ((inb_p(nic_base + EN0_ISR) & ENISR_RDC) == 0)
- if (jiffies - dma_start > 2*HZ/100) { /* 20ms */
+ if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */
printk("%s: timeout waiting for Tx RDC.\n", dev->name);
ne_reset_8390(dev);
NS8390_init(dev,1);
#include <linux/timer.h>
#include <linux/if_vlan.h>
#include <linux/rtnetlink.h>
+#include <linux/jiffies.h>
#include <asm/io.h>
#include <asm/uaccess.h>
{
struct ns83820 *dev = PRIV(ndev);
int timed_out = 0;
- long start;
+ unsigned long start;
u32 status;
int loops = 0;
break;
if (status & fail)
break;
- if ((jiffies - start) >= HZ) {
+ if (time_after_eq(jiffies, start + HZ)) {
timed_out = 1;
break;
}
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/init.h>
+#include <linux/jiffies.h>
#include <asm/board.h>
#include <asm/io.h>
#endif
while ((ei_ibp(base + EN0_ISR) & ENISR_RDC) == 0) {
- if (jiffies - start > OAKNET_WAIT) {
+ if (time_after(jiffies, start + OAKNET_WAIT)) {
printk("%s: timeout waiting for Tx RDC.\n", dev->name);
oaknet_reset_8390(dev);
NS8390_init(dev, TRUE);
#include <linux/if_arp.h>
#include <linux/ioport.h>
#include <linux/bitops.h>
+#include <linux/jiffies.h>
#include <pcmcia/cs_types.h>
#include <pcmcia/cs.h>
media = inw(ioaddr+WN4_MEDIA) & 0xc810;
/* Ignore collisions unless we've had no irq's recently */
- if (jiffies - lp->last_irq < HZ) {
+ if (time_before(jiffies, lp->last_irq + HZ)) {
media &= ~0x0010;
} else {
/* Try harder to detect carrier errors */
#include <linux/ppp_channel.h>
#include <linux/spinlock.h>
#include <linux/init.h>
+#include <linux/jiffies.h>
#include <asm/uaccess.h>
#include <asm/string.h>
* character if necessary.
*/
if (islcp || flag_time == 0
- || jiffies - ap->last_xmit >= flag_time)
+ || time_after_eq(jiffies, ap->last_xmit + flag_time))
*buf++ = PPP_FLAG;
ap->last_xmit = jiffies;
fcs = PPP_INITFCS;
static char s2io_driver_name[] = "Neterion";
static char s2io_driver_version[] = DRV_VERSION;
-int rxd_size[4] = {32,48,48,64};
-int rxd_count[4] = {127,85,85,63};
+static int rxd_size[4] = {32,48,48,64};
+static int rxd_count[4] = {127,85,85,63};
static inline int RXD_IS_UP2DT(RxD_t *rxdp)
{
}
}
-int fill_rxd_3buf(nic_t *nic, RxD_t *rxdp, struct sk_buff *skb)
+static int fill_rxd_3buf(nic_t *nic, RxD_t *rxdp, struct sk_buff *skb)
{
struct net_device *dev = nic->dev;
struct sk_buff *frag_list;
* void.
*/
-void s2io_reset(nic_t * sp)
+static void s2io_reset(nic_t * sp)
{
XENA_dev_config_t __iomem *bar0 = sp->bar0;
u64 val64;
* SUCCESS on success and FAILURE on failure.
*/
-int s2io_set_swapper(nic_t * sp)
+static int s2io_set_swapper(nic_t * sp)
{
struct net_device *dev = sp->dev;
XENA_dev_config_t __iomem *bar0 = sp->bar0;
return ret;
}
-void restore_xmsi_data(nic_t *nic)
+static void restore_xmsi_data(nic_t *nic)
{
XENA_dev_config_t __iomem *bar0 = nic->bar0;
u64 val64;
return 0;
}
-int s2io_enable_msi_x(nic_t *nic)
+static int s2io_enable_msi_x(nic_t *nic)
{
XENA_dev_config_t __iomem *bar0 = nic->bar0;
u64 tx_mat, rx_mat;
* as defined in errno.h file on failure.
*/
-int s2io_set_mac_addr(struct net_device *dev, u8 * addr)
+static int s2io_set_mac_addr(struct net_device *dev, u8 * addr)
{
nic_t *sp = dev->priv;
XENA_dev_config_t __iomem *bar0 = sp->bar0;
* void.
*/
-void s2io_link(nic_t * sp, int link)
+static void s2io_link(nic_t * sp, int link)
{
struct net_device *dev = (struct net_device *) sp->dev;
* returns the revision ID of the device.
*/
-int get_xena_rev_id(struct pci_dev *pdev)
+static int get_xena_rev_id(struct pci_dev *pdev)
{
u8 id = 0;
int ret;
* Description: This function is the cleanup routine for the driver. It unregist * ers the driver.
*/
-void s2io_closer(void)
+static void s2io_closer(void)
{
pci_unregister_driver(&s2io_driver);
DBG_PRINT(INIT_DBG, "cleanup done\n");
#define INTR_DBG 4
/* Global variable that defines the present debug level of the driver. */
-int debug_level = ERR_DBG; /* Default level. */
+static int debug_level = ERR_DBG;
/* DEBUG message print. */
#define DBG_PRINT(dbg_level, args...) if(!(debug_level<dbg_level)) printk(args)
#define MAX_RX_RINGS 8
/* FIFO mappings for all possible number of fifos configured */
-int fifo_map[][MAX_TX_FIFOS] = {
+static int fifo_map[][MAX_TX_FIFOS] = {
{0, 0, 0, 0, 0, 0, 0, 0},
{0, 0, 0, 0, 1, 1, 1, 1},
{0, 0, 0, 1, 1, 1, 2, 2},
static void alarm_intr_handler(struct s2io_nic *sp);
static int s2io_starter(void);
-void s2io_closer(void);
static void s2io_tx_watchdog(struct net_device *dev);
static void s2io_tasklet(unsigned long dev_addr);
static void s2io_set_multicast(struct net_device *dev);
static int rx_osm_handler(ring_info_t *ring_data, RxD_t * rxdp);
-void s2io_link(nic_t * sp, int link);
-void s2io_reset(nic_t * sp);
+static void s2io_link(nic_t * sp, int link);
#if defined(CONFIG_S2IO_NAPI)
static int s2io_poll(struct net_device *dev, int *budget);
#endif
static void s2io_init_pci(nic_t * sp);
-int s2io_set_mac_addr(struct net_device *dev, u8 * addr);
+static int s2io_set_mac_addr(struct net_device *dev, u8 * addr);
static void s2io_alarm_handle(unsigned long data);
static int s2io_enable_msi(nic_t *nic);
static irqreturn_t s2io_msi_handle(int irq, void *dev_id, struct pt_regs *regs);
s2io_msix_ring_handle(int irq, void *dev_id, struct pt_regs *regs);
static irqreturn_t
s2io_msix_fifo_handle(int irq, void *dev_id, struct pt_regs *regs);
-int s2io_enable_msi_x(nic_t *nic);
static irqreturn_t s2io_isr(int irq, void *dev_id, struct pt_regs *regs);
static int verify_xena_quiescence(nic_t *sp, u64 val64, int flag);
static struct ethtool_ops netdev_ethtool_ops;
static void s2io_set_link(unsigned long data);
-int s2io_set_swapper(nic_t * sp);
+static int s2io_set_swapper(nic_t * sp);
static void s2io_card_down(nic_t *nic);
static int s2io_card_up(nic_t *nic);
-int get_xena_rev_id(struct pci_dev *pdev);
-void restore_xmsi_data(nic_t *nic);
+static int get_xena_rev_id(struct pci_dev *pdev);
+static void restore_xmsi_data(nic_t *nic);
#endif /* _S2IO_H */
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/bitops.h>
+#include <linux/jiffies.h>
#include <asm/system.h>
#include <asm/io.h>
int ioaddr = dev->base_addr;
int status = inw(SEEQ_STATUS);
int transmit_ptr = 0;
- int tmp;
+ unsigned long tmp;
if (net_debug>4) {
printk("%s: send 0x%04x\n",dev->name,length);
/* drain FIFO */
tmp = jiffies;
- while ( (((status=inw(SEEQ_STATUS)) & SEEQSTAT_FIFO_EMPTY) == 0) && (jiffies - tmp < HZ))
+ while ( (((status=inw(SEEQ_STATUS)) & SEEQSTAT_FIFO_EMPTY) == 0) && time_before(jiffies, tmp + HZ))
mb();
/* doit ! */
#include <linux/if_arp.h>
#include <linux/init.h>
#include <linux/if_shaper.h>
+#include <linux/jiffies.h>
#include <net/dst.h>
#include <net/arp.h>
/*
* Queue over time. Spill packet.
*/
- if(SHAPERCB(skb)->shapeclock-jiffies > SHAPER_LATENCY) {
+ if(time_after(SHAPERCB(skb)->shapeclock,jiffies + SHAPER_LATENCY)) {
dev_kfree_skb(skb);
shaper->stats.tx_dropped++;
} else
SK_U32 PortNumber,
int Flags);
-extern int SkAddrXmacMcClear(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- int Flags);
-
-extern int SkAddrGmacMcClear(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- int Flags);
-
extern int SkAddrMcAdd(
SK_AC *pAC,
SK_IOC IoC,
SK_MAC_ADDR *pMc,
int Flags);
-extern int SkAddrXmacMcAdd(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- SK_MAC_ADDR *pMc,
- int Flags);
-
-extern int SkAddrGmacMcAdd(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- SK_MAC_ADDR *pMc,
- int Flags);
-
extern int SkAddrMcUpdate(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber);
-extern int SkAddrXmacMcUpdate(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber);
-
-extern int SkAddrGmacMcUpdate(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber);
-
extern int SkAddrOverride(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
int NewPromMode);
-extern int SkAddrXmacPromiscuousChange(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- int NewPromMode);
-
-extern int SkAddrGmacPromiscuousChange(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- int NewPromMode);
-
#ifndef SK_SLIM
extern int SkAddrSwap(
SK_AC *pAC,
unsigned Checksum2,
int NetNumber);
-extern void SkCsGetSendInfo(
- SK_AC *pAc,
- void *pIpHeader,
- SKCS_PACKET_INFO *pPacketInfo,
- int NetNumber);
-
extern void SkCsSetReceiveFlags(
SK_AC *pAc,
unsigned ReceiveFlags,
/*
* public functions in skgeinit.c
*/
-extern void SkGePollRxD(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- SK_BOOL PollRxD);
-
extern void SkGePollTxD(
SK_AC *pAC,
SK_IOC IoC,
int Led,
int Mode);
-extern void SkGeInitRamIface(
- SK_AC *pAC,
- SK_IOC IoC);
-
extern int SkGeInitAssignRamToQueues(
SK_AC *pAC,
int ActivePort,
SK_IOC IoC,
int Port);
-extern void SkMacClearRst(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
extern void SkXmInitMac(
SK_AC *pAC,
SK_IOC IoC,
SK_IOC IoC,
int Port);
-extern void SkMacFlushRxFifo(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
extern void SkMacIrq(
SK_AC *pAC,
SK_IOC IoC,
int Port,
SK_U16 IStatus);
-extern void SkMacSetRxTxEn(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- int Para);
-
extern int SkMacRxTxEnable(
SK_AC *pAC,
SK_IOC IoC,
int StartNum,
int StopNum);
-extern void SkXmInitDupMd(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
-extern void SkXmInitPauseMd(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
extern void SkXmAutoNegLipaXmac(
SK_AC *pAC,
SK_IOC IoC,
int Port,
SK_BOOL StartTest);
-extern int SkGmEnterLowPowerMode(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- SK_U8 Mode);
-
-extern int SkGmLeaveLowPowerMode(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
#ifdef SK_DIAG
extern void SkGePhyRead(
SK_AC *pAC,
/*
* public functions in skgeinit.c
*/
-extern void SkGePollRxD();
extern void SkGePollTxD();
extern void SkGeYellowLED();
extern int SkGeCfgSync();
extern void SkGeDeInit();
extern int SkGeInitPort();
extern void SkGeXmitLED();
-extern void SkGeInitRamIface();
extern int SkGeInitAssignRamToQueues();
/*
extern void SkMacRxTxDisable();
extern void SkMacSoftRst();
extern void SkMacHardRst();
-extern void SkMacClearRst();
extern void SkMacInitPhy();
extern int SkMacRxTxEnable();
extern void SkMacPromiscMode();
extern void SkMacHashing();
extern void SkMacIrqDisable();
extern void SkMacFlushTxFifo();
-extern void SkMacFlushRxFifo();
extern void SkMacIrq();
extern int SkMacAutoNegDone();
extern void SkMacAutoNegLipaPhy();
-extern void SkMacSetRxTxEn();
extern void SkXmInitMac();
extern void SkXmPhyRead();
extern void SkXmPhyWrite();
extern void SkGmPhyRead();
extern void SkGmPhyWrite();
extern void SkXmClrExactAddr();
-extern void SkXmInitDupMd();
-extern void SkXmInitPauseMd();
extern void SkXmAutoNegLipaXmac();
extern int SkXmUpdateStats();
extern int SkGmUpdateStats();
extern int SkXmOverflowStatus();
extern int SkGmOverflowStatus();
extern int SkGmCableDiagStatus();
-extern int SkGmEnterLowPowerMode();
-extern int SkGmLeaveLowPowerMode();
#ifdef SK_DIAG
extern void SkGePhyRead();
* Function prototypes
*/
extern int SkPnmiInit(SK_AC *pAC, SK_IOC IoC, int Level);
-extern int SkPnmiGetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void* pBuf,
- unsigned int* pLen, SK_U32 Instance, SK_U32 NetIndex);
-extern int SkPnmiPreSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id,
- void* pBuf, unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
extern int SkPnmiSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void* pBuf,
unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
extern int SkPnmiGetStruct(SK_AC *pAC, SK_IOC IoC, void* pBuf,
extern void SkGeSirqIsr(SK_AC *pAC, SK_IOC IoC, SK_U32 Istatus);
extern int SkGeSirqEvent(SK_AC *pAC, SK_IOC IoC, SK_U32 Event, SK_EVPARA Para);
-extern void SkHWLinkUp(SK_AC *pAC, SK_IOC IoC, int Port);
extern void SkHWLinkDown(SK_AC *pAC, SK_IOC IoC, int Port);
#endif /* _INC_SKGESIRQ_H_ */
} SK_I2C;
extern int SkI2cInit(SK_AC *pAC, SK_IOC IoC, int Level);
-extern int SkI2cWrite(SK_AC *pAC, SK_IOC IoC, SK_U32 Data, int Dev, int Size,
- int Reg, int Burst);
-extern int SkI2cReadSensor(SK_AC *pAC, SK_IOC IoC, SK_SENSOR *pSen);
#ifdef SK_DIAG
extern SK_U32 SkI2cRead(SK_AC *pAC, SK_IOC IoC, int Dev, int Size, int Reg,
int Burst);
int addr);
#endif /* SKDIAG */
-extern int VpdSetupPara(
- SK_AC *pAC,
- const char *key,
- const char *buf,
- int len,
- int type,
- int op);
-
extern SK_VPD_STATUS *VpdStat(
SK_AC *pAC,
SK_IOC IoC);
SK_AC *pAC,
SK_IOC IoC);
-extern void VpdErrLog(
- SK_AC *pAC,
- SK_IOC IoC,
- char *msg);
-
#ifdef SKDIAG
extern int VpdReadBlock(
SK_AC *pAC,
#endif /* SKDIAG */
#else /* SK_KR_PROTO */
extern SK_U32 VpdReadDWord();
-extern int VpdSetupPara();
extern SK_VPD_STATUS *VpdStat();
extern int VpdKeys();
extern int VpdRead();
extern int VpdWrite();
extern int VpdDelete();
extern int VpdUpdate();
-extern void VpdErrLog();
#endif /* SK_KR_PROTO */
#endif /* __INC_SKVPD_H_ */
static int Next0[SK_MAX_MACS] = {0};
#endif /* DEBUG */
+static int SkAddrGmacMcAdd(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber,
+ SK_MAC_ADDR *pMc, int Flags);
+static int SkAddrGmacMcClear(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber,
+ int Flags);
+static int SkAddrGmacMcUpdate(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber);
+static int SkAddrGmacPromiscuousChange(SK_AC *pAC, SK_IOC IoC,
+ SK_U32 PortNumber, int NewPromMode);
+static int SkAddrXmacMcAdd(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber,
+ SK_MAC_ADDR *pMc, int Flags);
+static int SkAddrXmacMcClear(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber,
+ int Flags);
+static int SkAddrXmacMcUpdate(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber);
+static int SkAddrXmacPromiscuousChange(SK_AC *pAC, SK_IOC IoC,
+ SK_U32 PortNumber, int NewPromMode);
+
/* functions ******************************************************************/
/******************************************************************************
* SK_ADDR_SUCCESS
* SK_ADDR_ILLEGAL_PORT
*/
-int SkAddrXmacMcClear(
+static int SkAddrXmacMcClear(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* I/O context */
SK_U32 PortNumber, /* Index of affected port */
* SK_ADDR_SUCCESS
* SK_ADDR_ILLEGAL_PORT
*/
-int SkAddrGmacMcClear(
+static int SkAddrGmacMcClear(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* I/O context */
SK_U32 PortNumber, /* Index of affected port */
* Returns:
* Hash value of multicast address.
*/
-SK_U32 SkXmacMcHash(
+static SK_U32 SkXmacMcHash(
unsigned char *pMc) /* Multicast address */
{
SK_U32 Idx;
* Returns:
* Hash value of multicast address.
*/
-SK_U32 SkGmacMcHash(
+static SK_U32 SkGmacMcHash(
unsigned char *pMc) /* Multicast address */
{
SK_U32 Data;
* SK_MC_ILLEGAL_ADDRESS
* SK_MC_RLMT_OVERFLOW
*/
-int SkAddrXmacMcAdd(
+static int SkAddrXmacMcAdd(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* I/O context */
SK_U32 PortNumber, /* Port Number */
* SK_MC_FILTERING_INEXACT
* SK_MC_ILLEGAL_ADDRESS
*/
-int SkAddrGmacMcAdd(
+static int SkAddrGmacMcAdd(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* I/O context */
SK_U32 PortNumber, /* Port Number */
* SK_MC_FILTERING_INEXACT
* SK_ADDR_ILLEGAL_PORT
*/
-int SkAddrXmacMcUpdate(
+static int SkAddrXmacMcUpdate(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* I/O context */
SK_U32 PortNumber) /* Port Number */
* SK_MC_FILTERING_INEXACT
* SK_ADDR_ILLEGAL_PORT
*/
-int SkAddrGmacMcUpdate(
+static int SkAddrGmacMcUpdate(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* I/O context */
SK_U32 PortNumber) /* Port Number */
* SK_ADDR_SUCCESS
* SK_ADDR_ILLEGAL_PORT
*/
-int SkAddrXmacPromiscuousChange(
+static int SkAddrXmacPromiscuousChange(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* I/O context */
SK_U32 PortNumber, /* port whose promiscuous mode changes */
* SK_ADDR_SUCCESS
* SK_ADDR_ILLEGAL_PORT
*/
-int SkAddrGmacPromiscuousChange(
+static int SkAddrGmacPromiscuousChange(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* I/O context */
SK_U32 PortNumber, /* port whose promiscuous mode changes */
#endif
};
-/******************************************************************************
- *
- * SkGePollRxD() - Enable / Disable Descriptor Polling of RxD Ring
- *
- * Description:
- * Enable or disable the descriptor polling of the receive descriptor
- * ring (RxD) for port 'Port'.
- * The new configuration is *not* saved over any SkGeStopPort() and
- * SkGeInitPort() calls.
- *
- * Returns:
- * nothing
- */
-void SkGePollRxD(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL PollRxD) /* SK_TRUE (enable pol.), SK_FALSE (disable pol.) */
-{
- SK_GEPORT *pPrt;
-
- pPrt = &pAC->GIni.GP[Port];
-
- SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), (PollRxD) ?
- CSR_ENA_POL : CSR_DIS_POL);
-} /* SkGePollRxD */
-
-
/******************************************************************************
*
* SkGePollTxD() - Enable / Disable Descriptor Polling of TxD Rings
* Returns:
* nothing
*/
-void SkGeInitRamIface(
+static void SkGeInitRamIface(
SK_AC *pAC, /* adapter context */
SK_IOC IoC) /* IO context */
{
} /* SkGeInit0*/
-#ifdef SK_PCI_RESET
-
-/******************************************************************************
- *
- * SkGePciReset() - Reset PCI interface
- *
- * Description:
- * o Read PCI configuration.
- * o Change power state to 3.
- * o Change power state to 0.
- * o Restore PCI configuration.
- *
- * Returns:
- * 0: Success.
- * 1: Power state could not be changed to 3.
- */
-static int SkGePciReset(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC) /* IO context */
-{
- int i;
- SK_U16 PmCtlSts;
- SK_U32 Bp1;
- SK_U32 Bp2;
- SK_U16 PciCmd;
- SK_U8 Cls;
- SK_U8 Lat;
- SK_U8 ConfigSpace[PCI_CFG_SIZE];
-
- /*
- * Note: Switching to D3 state is like a software reset.
- * Switching from D3 to D0 is a hardware reset.
- * We have to save and restore the configuration space.
- */
- for (i = 0; i < PCI_CFG_SIZE; i++) {
- SkPciReadCfgDWord(pAC, i*4, &ConfigSpace[i]);
- }
-
- /* We know the RAM Interface Arbiter is enabled. */
- SkPciWriteCfgWord(pAC, PCI_PM_CTL_STS, PCI_PM_STATE_D3);
- SkPciReadCfgWord(pAC, PCI_PM_CTL_STS, &PmCtlSts);
-
- if ((PmCtlSts & PCI_PM_STATE_MSK) != PCI_PM_STATE_D3) {
- return(1);
- }
-
- /* Return to D0 state. */
- SkPciWriteCfgWord(pAC, PCI_PM_CTL_STS, PCI_PM_STATE_D0);
-
- /* Check for D0 state. */
- SkPciReadCfgWord(pAC, PCI_PM_CTL_STS, &PmCtlSts);
-
- if ((PmCtlSts & PCI_PM_STATE_MSK) != PCI_PM_STATE_D0) {
- return(1);
- }
-
- /* Check PCI Config Registers. */
- SkPciReadCfgWord(pAC, PCI_COMMAND, &PciCmd);
- SkPciReadCfgByte(pAC, PCI_CACHE_LSZ, &Cls);
- SkPciReadCfgDWord(pAC, PCI_BASE_1ST, &Bp1);
- SkPciReadCfgDWord(pAC, PCI_BASE_2ND, &Bp2);
- SkPciReadCfgByte(pAC, PCI_LAT_TIM, &Lat);
-
- if (PciCmd != 0 || Cls != (SK_U8)0 || Lat != (SK_U8)0 ||
- (Bp1 & 0xfffffff0L) != 0 || Bp2 != 1) {
- return(1);
- }
-
- /* Restore PCI Config Space. */
- for (i = 0; i < PCI_CFG_SIZE; i++) {
- SkPciWriteCfgDWord(pAC, i*4, ConfigSpace[i]);
- }
-
- return(0);
-} /* SkGePciReset */
-
-#endif /* SK_PCI_RESET */
/******************************************************************************
*
/* save CLK_RUN bits (YUKON-Lite) */
SK_IN16(IoC, B0_CTST, &CtrlStat);
-#ifdef SK_PCI_RESET
- (void)SkGePciReset(pAC, IoC);
-#endif /* SK_PCI_RESET */
-
/* do the SW-reset */
SK_OUT8(IoC, B0_CTST, CS_RST_SET);
int i;
SK_U16 Word;
-#ifdef SK_PHY_LP_MODE
- SK_U8 Byte;
- SK_U16 PmCtlSts;
-#endif /* SK_PHY_LP_MODE */
-
#if (!defined(SK_SLIM) && !defined(VCPU))
/* ensure I2C is ready */
SkI2cWaitIrq(pAC, IoC);
}
}
-#ifdef SK_PHY_LP_MODE
- /*
- * for power saving purposes within mobile environments
- * we set the PHY to coma mode and switch to D3 power state.
- */
- if (pAC->GIni.GIYukonLite &&
- pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) {
-
- /* for all ports switch PHY to coma mode */
- for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
-
- SkGmEnterLowPowerMode(pAC, IoC, i, PHY_PM_DEEP_SLEEP);
- }
-
- if (pAC->GIni.GIVauxAvail) {
- /* switch power to VAUX */
- Byte = PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_ON | PC_VCC_OFF;
-
- SK_OUT8(IoC, B0_POWER_CTRL, Byte);
- }
-
- /* switch to D3 state */
- SK_IN16(IoC, PCI_C(PCI_PM_CTL_STS), &PmCtlSts);
-
- PmCtlSts |= PCI_PM_STATE_D3;
-
- SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
-
- SK_OUT16(IoC, PCI_C(PCI_PM_CTL_STS), PmCtlSts);
- }
-#endif /* SK_PHY_LP_MODE */
-
/* Reset all bits in the PCI STATUS register */
/*
* Note: PCI Cfg cycles cannot be used, because they are not
sizeof(SK_PNMI_CONF),
SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyType),
SK_PNMI_RO, MacPrivateConf, 0},
-#ifdef SK_PHY_LP_MODE
- {OID_SKGE_PHY_LP_MODE,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyMode),
- SK_PNMI_RW, MacPrivateConf, 0},
-#endif
{OID_SKGE_LINK_CAP,
SK_PNMI_MAC_ENTRIES,
sizeof(SK_PNMI_CONF),
* Public Function prototypes
*/
int SkPnmiInit(SK_AC *pAC, SK_IOC IoC, int level);
-int SkPnmiGetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void *pBuf,
- unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
-int SkPnmiPreSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void *pBuf,
- unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
int SkPnmiSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void *pBuf,
unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
int SkPnmiGetStruct(SK_AC *pAC, SK_IOC IoC, void *pBuf,
* exist (e.g. port instance 3 on a two port
* adapter.
*/
-int SkPnmiGetVar(
+static int SkPnmiGetVar(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
SK_U32 Id, /* Object ID that is to be processed */
* exist (e.g. port instance 3 on a two port
* adapter.
*/
-int SkPnmiPreSetVar(
+static int SkPnmiPreSetVar(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
SK_U32 Id, /* Object ID that is to be processed */
case OID_SKGE_SPEED_CAP:
case OID_SKGE_SPEED_MODE:
case OID_SKGE_SPEED_STATUS:
-#ifdef SK_PHY_LP_MODE
- case OID_SKGE_PHY_LP_MODE:
-#endif
if (*pLen < (Limit - LogPortIndex) * sizeof(SK_U8)) {
*pLen = (Limit - LogPortIndex) * sizeof(SK_U8);
Offset += sizeof(SK_U32);
break;
-#ifdef SK_PHY_LP_MODE
- case OID_SKGE_PHY_LP_MODE:
- if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
- if (LogPortIndex == 0) {
- continue;
- }
- else {
- /* Get value for physical ports */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
- Val8 = (SK_U8) pAC->GIni.GP[PhysPortIndex].PPhyPowerState;
- *pBufPtr = Val8;
- }
- }
- else { /* DualNetMode */
-
- Val8 = (SK_U8) pAC->GIni.GP[PhysPortIndex].PPhyPowerState;
- *pBufPtr = Val8;
- }
- Offset += sizeof(SK_U8);
- break;
-#endif
-
case OID_SKGE_LINK_CAP:
if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
if (LogPortIndex == 0) {
}
break;
-#ifdef SK_PHY_LP_MODE
- case OID_SKGE_PHY_LP_MODE:
- if (*pLen < Limit - LogPortIndex) {
-
- *pLen = Limit - LogPortIndex;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-#endif
-
case OID_SKGE_MTU:
if (*pLen < sizeof(SK_U32)) {
Offset += sizeof(SK_U32);
break;
-#ifdef SK_PHY_LP_MODE
- case OID_SKGE_PHY_LP_MODE:
- /* The preset ends here */
- if (Action == SK_PNMI_PRESET) {
-
- return (SK_PNMI_ERR_OK);
- }
-
- if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
- if (LogPortIndex == 0) {
- Offset = 0;
- continue;
- }
- else {
- /* Set value for physical ports */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
-
- switch (*(pBuf + Offset)) {
- case 0:
- /* If LowPowerMode is active, we can leave it. */
- if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
-
- Val32 = SkGmLeaveLowPowerMode(pAC, IoC, PhysPortIndex);
-
- if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState < 3) {
-
- SkDrvInitAdapter(pAC);
- }
- break;
- }
- else {
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- case 1:
- case 2:
- case 3:
- case 4:
- /* If no LowPowerMode is active, we can enter it. */
- if (!pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
-
- if ((*(pBuf + Offset)) < 3) {
-
- SkDrvDeInitAdapter(pAC);
- }
-
- Val32 = SkGmEnterLowPowerMode(pAC, IoC, PhysPortIndex, *pBuf);
- break;
- }
- else {
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- default:
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
- }
- }
- else { /* DualNetMode */
-
- switch (*(pBuf + Offset)) {
- case 0:
- /* If we are in a LowPowerMode, we can leave it. */
- if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
-
- Val32 = SkGmLeaveLowPowerMode(pAC, IoC, PhysPortIndex);
-
- if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState < 3) {
-
- SkDrvInitAdapter(pAC);
- }
- break;
- }
- else {
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- case 1:
- case 2:
- case 3:
- case 4:
- /* If we are not already in LowPowerMode, we can enter it. */
- if (!pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
-
- if ((*(pBuf + Offset)) < 3) {
-
- SkDrvDeInitAdapter(pAC);
- }
- else {
-
- Val32 = SkGmEnterLowPowerMode(pAC, IoC, PhysPortIndex, *pBuf);
- }
- break;
- }
- else {
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- default:
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
- }
- Offset += sizeof(SK_U8);
- break;
-#endif
-
default:
SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_ERR,
("MacPrivateConf: Unknown OID should be handled before set"));
*
* Returns: N/A
*/
-void SkHWLinkUp(
+static void SkHWLinkUp(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
* we ignore those
*/
pPrt->HalfDupTimerActive = SK_TRUE;
-#ifdef XXX
- Len = sizeof(SK_U64);
- SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
- &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, 0),
- pAC->Rlmt.Port[0].Net->NetNumber);
-
- pPrt->LastOctets = Octets;
-#endif /* XXX */
/* Snap statistic counters */
(void)SkXmUpdateStats(pAC, IoC, 0);
pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) &&
!pPrt->HalfDupTimerActive) {
pPrt->HalfDupTimerActive = SK_TRUE;
-#ifdef XXX
- Len = sizeof(SK_U64);
- SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
- &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, 1),
- pAC->Rlmt.Port[1].Net->NetNumber);
-
- pPrt->LastOctets = Octets;
-#endif /* XXX */
/* Snap statistic counters */
(void)SkXmUpdateStats(pAC, IoC, 1);
pPrt->HalfDupTimerActive = SK_FALSE;
if (pPrt->PLinkModeStatus == SK_LMODE_STAT_HALF ||
pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) {
-#ifdef XXX
- Len = sizeof(SK_U64);
- SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
- &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, Port),
- pAC->Rlmt.Port[Port].Net->NetNumber);
-#endif /* XXX */
/* Snap statistic counters */
(void)SkXmUpdateStats(pAC, IoC, Port);
* 1: error, transfer does not complete, I2C transfer
* killed, wait loop terminated.
*/
-int SkI2cWait(
+static int SkI2cWait(
SK_AC *pAC, /* Adapter Context */
SK_IOC IoC, /* I/O Context */
int Event) /* complete event to wait for (I2C_READ or I2C_WRITE) */
* returns 0: success
* 1: error
*/
-int SkI2cWrite(
+static int SkI2cWrite(
SK_AC *pAC, /* Adapter Context */
SK_IOC IoC, /* I/O Context */
SK_U32 I2cData, /* I2C Data to write */
* 1 if the read is completed
* 0 if the read must be continued (I2C Bus still allocated)
*/
-int SkI2cReadSensor(
+static int SkI2cReadSensor(
SK_AC *pAC, /* Adapter Context */
SK_IOC IoC, /* I/O Context */
SK_SENSOR *pSen) /* Sensor to be read */
#include "h/lm80.h"
#include "h/skdrv2nd.h" /* Adapter Control- and Driver specific Def. */
-#ifdef SK_DIAG
-#define BREAK_OR_WAIT(pAC,IoC,Event) SkI2cWait(pAC,IoC,Event)
-#else /* nSK_DIAG */
#define BREAK_OR_WAIT(pAC,IoC,Event) break
-#endif /* nSK_DIAG */
-
-#ifdef SK_DIAG
-/*
- * read the register 'Reg' from the device 'Dev'
- *
- * return read error -1
- * success the read value
- */
-int SkLm80RcvReg(
-SK_IOC IoC, /* Adapter Context */
-int Dev, /* I2C device address */
-int Reg) /* register to read */
-{
- int Val = 0;
- int TempExt;
-
- /* Signal device number */
- if (SkI2cSndDev(IoC, Dev, I2C_WRITE)) {
- return(-1);
- }
-
- if (SkI2cSndByte(IoC, Reg)) {
- return(-1);
- }
-
- /* repeat start */
- if (SkI2cSndDev(IoC, Dev, I2C_READ)) {
- return(-1);
- }
-
- switch (Reg) {
- case LM80_TEMP_IN:
- Val = (int)SkI2cRcvByte(IoC, 1);
-
- /* First: correct the value: it might be negative */
- if ((Val & 0x80) != 0) {
- /* Value is negative */
- Val = Val - 256;
- }
- Val = Val * SK_LM80_TEMP_LSB;
- SkI2cStop(IoC);
-
- TempExt = (int)SkLm80RcvReg(IoC, LM80_ADDR, LM80_TEMP_CTRL);
-
- if (Val > 0) {
- Val += ((TempExt >> 7) * SK_LM80_TEMPEXT_LSB);
- }
- else {
- Val -= ((TempExt >> 7) * SK_LM80_TEMPEXT_LSB);
- }
- return(Val);
- break;
- case LM80_VT0_IN:
- case LM80_VT1_IN:
- case LM80_VT2_IN:
- case LM80_VT3_IN:
- Val = (int)SkI2cRcvByte(IoC, 1) * SK_LM80_VT_LSB;
- break;
-
- default:
- Val = (int)SkI2cRcvByte(IoC, 1);
- break;
- }
-
- SkI2cStop(IoC);
- return(Val);
-}
-#endif /* SK_DIAG */
/*
* read a sensors value (LM80 specific)
SK_MAC_ADDR SkRlmtMcAddr = {{0x01, 0x00, 0x5A, 0x52, 0x4C, 0x4D}};
SK_MAC_ADDR BridgeMcAddr = {{0x01, 0x80, 0xC2, 0x00, 0x00, 0x00}};
-SK_MAC_ADDR BcAddr = {{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}};
/* local variables ************************************************************/
#endif /* SKDIAG */
-#if 0
-
-/*
- Write the dword 'data' at address 'addr' into the VPD EEPROM, and
- verify that the data is written.
-
- Needed Time:
-
-. MIN MAX
-. -------------------------------------------------------------------
-. write 1.8 ms 3.6 ms
-. internal write cyles 0.7 ms 7.0 ms
-. -------------------------------------------------------------------
-. over all program time 2.5 ms 10.6 ms
-. read 1.3 ms 2.6 ms
-. -------------------------------------------------------------------
-. over all 3.8 ms 13.2 ms
-.
-
-
- Returns 0: success
- 1: error, I2C transfer does not terminate
- 2: error, data verify error
-
- */
-static int VpdWriteDWord(
-SK_AC *pAC, /* pAC pointer */
-SK_IOC IoC, /* IO Context */
-int addr, /* VPD address */
-SK_U32 data) /* VPD data to write */
-{
- /* start VPD write */
- /* Don't swap here, it's a data stream of bytes */
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
- ("VPD write dword at addr 0x%x, data = 0x%x\n",addr,data));
- VPD_OUT32(pAC, IoC, PCI_VPD_DAT_REG, (SK_U32)data);
- /* But do it here */
- addr |= VPD_WRITE;
-
- VPD_OUT16(pAC, IoC, PCI_VPD_ADR_REG, (SK_U16)(addr | VPD_WRITE));
-
- /* this may take up to 10,6 ms */
- if (VpdWait(pAC, IoC, VPD_WRITE)) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("Write Timed Out\n"));
- return(1);
- };
-
- /* verify data */
- if (VpdReadDWord(pAC, IoC, addr) != data) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
- ("Data Verify Error\n"));
- return(2);
- }
- return(0);
-} /* VpdWriteDWord */
-
-#endif /* 0 */
-
/*
* Read one Stream of 'len' bytes of VPD data, starting at 'addr' from
* or to the I2C EEPROM.
* 6: fatal VPD error
*
*/
-int VpdSetupPara(
+static int VpdSetupPara(
SK_AC *pAC, /* common data base */
const char *key, /* keyword to insert */
const char *buf, /* buffer with the keyword value */
return(0);
}
-
-
-/*
- * Read the contents of the VPD EEPROM and copy it to the VPD buffer
- * if not already done. If the keyword "VF" is not present it will be
- * created and the error log message will be stored to this keyword.
- * If "VF" is not present the error log message will be stored to the
- * keyword "VL". "VL" will created or overwritten if "VF" is present.
- * The VPD read/write area is saved to the VPD EEPROM.
- *
- * returns nothing, errors will be ignored.
- */
-void VpdErrLog(
-SK_AC *pAC, /* common data base */
-SK_IOC IoC, /* IO Context */
-char *msg) /* error log message */
-{
- SK_VPD_PARA *v, vf; /* VF */
- int len;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX,
- ("VPD error log msg %s\n", msg));
- if ((pAC->vpd.v.vpd_status & VPD_VALID) == 0) {
- if (VpdInit(pAC, IoC) != 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("VPD init error\n"));
- return;
- }
- }
-
- len = strlen(msg);
- if (len > VPD_MAX_LEN) {
- /* cut it */
- len = VPD_MAX_LEN;
- }
- if ((v = vpd_find_para(pAC, VPD_VF, &vf)) != NULL) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, ("overwrite VL\n"));
- (void)VpdSetupPara(pAC, VPD_VL, msg, len, VPD_RW_KEY, OWR_KEY);
- }
- else {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, ("write VF\n"));
- (void)VpdSetupPara(pAC, VPD_VF, msg, len, VPD_RW_KEY, ADD_KEY);
- }
-
- (void)VpdUpdate(pAC, IoC);
-}
-
#endif
#ifdef GENESIS
-BCOM_HACK BcomRegA1Hack[] = {
+static BCOM_HACK BcomRegA1Hack[] = {
{ 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1104 }, { 0x17, 0x0013 },
{ 0x15, 0x0404 }, { 0x17, 0x8006 }, { 0x15, 0x0132 }, { 0x17, 0x8006 },
{ 0x15, 0x0232 }, { 0x17, 0x800D }, { 0x15, 0x000F }, { 0x18, 0x0420 },
{ 0, 0 }
};
-BCOM_HACK BcomRegC0Hack[] = {
+static BCOM_HACK BcomRegC0Hack[] = {
{ 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1204 }, { 0x17, 0x0013 },
{ 0x15, 0x0A04 }, { 0x18, 0x0420 },
{ 0, 0 }
* Returns:
* nothing
*/
-void SkMacFlushRxFifo(
+static void SkMacFlushRxFifo(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
} /* SkMacHardRst */
-/******************************************************************************
- *
- * SkMacClearRst() - Clear the MAC reset
- *
- * Description: calls a clear MAC reset routine dep. on board type
- *
- * Returns:
- * nothing
- */
-void SkMacClearRst(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
-
-#ifdef GENESIS
- if (pAC->GIni.GIGenesis) {
-
- SkXmClearRst(pAC, IoC, Port);
- }
-#endif /* GENESIS */
-
-#ifdef YUKON
- if (pAC->GIni.GIYukon) {
-
- SkGmClearRst(pAC, IoC, Port);
- }
-#endif /* YUKON */
-
-} /* SkMacClearRst */
-
-
#ifdef GENESIS
/******************************************************************************
*
* Returns:
* nothing
*/
-void SkXmInitDupMd(
+static void SkXmInitDupMd(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
* Returns:
* nothing
*/
-void SkXmInitPauseMd(
+static void SkXmInitPauseMd(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
} /* SkXmInitPhyBcom */
#endif /* GENESIS */
-
#ifdef YUKON
-#ifndef SK_SLIM
-/******************************************************************************
- *
- * SkGmEnterLowPowerMode()
- *
- * Description:
- * This function sets the Marvell Alaska PHY to the low power mode
- * given by parameter mode.
- * The following low power modes are available:
- *
- * - Coma Mode (Deep Sleep):
- * Power consumption: ~15 - 30 mW
- * The PHY cannot wake up on its own.
- *
- * - IEEE 22.2.4.1.5 compatible power down mode
- * Power consumption: ~240 mW
- * The PHY cannot wake up on its own.
- *
- * - energy detect mode
- * Power consumption: ~160 mW
- * The PHY can wake up on its own by detecting activity
- * on the CAT 5 cable.
- *
- * - energy detect plus mode
- * Power consumption: ~150 mW
- * The PHY can wake up on its own by detecting activity
- * on the CAT 5 cable.
- * Connected devices can be woken up by sending normal link
- * pulses every one second.
- *
- * Note:
- *
- * Returns:
- * 0: ok
- * 1: error
- */
-int SkGmEnterLowPowerMode(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (e.g. MAC_1) */
-SK_U8 Mode) /* low power mode */
-{
- SK_U16 Word;
- SK_U32 DWord;
- SK_U8 LastMode;
- int Ret = 0;
-
- if (pAC->GIni.GIYukonLite &&
- pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) {
-
- /* save current power mode */
- LastMode = pAC->GIni.GP[Port].PPhyPowerState;
- pAC->GIni.GP[Port].PPhyPowerState = Mode;
-
- switch (Mode) {
- /* coma mode (deep sleep) */
- case PHY_PM_DEEP_SLEEP:
- /* setup General Purpose Control Register */
- GM_OUT16(IoC, 0, GM_GP_CTRL, GM_GPCR_FL_PASS |
- GM_GPCR_SPEED_100 | GM_GPCR_AU_ALL_DIS);
-
- /* apply COMA mode workaround */
- SkGmPhyWrite(pAC, IoC, Port, 29, 0x001f);
- SkGmPhyWrite(pAC, IoC, Port, 30, 0xfff3);
-
- SK_IN32(IoC, PCI_C(PCI_OUR_REG_1), &DWord);
-
- SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
-
- /* Set PHY to Coma Mode */
- SK_OUT32(IoC, PCI_C(PCI_OUR_REG_1), DWord | PCI_PHY_COMA);
-
- SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
-
- break;
-
- /* IEEE 22.2.4.1.5 compatible power down mode */
- case PHY_PM_IEEE_POWER_DOWN:
- /*
- * - disable MAC 125 MHz clock
- * - allow MAC power down
- */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
- Word |= PHY_M_PC_DIS_125CLK;
- Word &= ~PHY_M_PC_MAC_POW_UP;
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
-
- /*
- * register changes must be followed by a software
- * reset to take effect
- */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
- Word |= PHY_CT_RESET;
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
-
- /* switch IEEE compatible power down mode on */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
- Word |= PHY_CT_PDOWN;
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
- break;
-
- /* energy detect and energy detect plus mode */
- case PHY_PM_ENERGY_DETECT:
- case PHY_PM_ENERGY_DETECT_PLUS:
- /*
- * - disable MAC 125 MHz clock
- */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
- Word |= PHY_M_PC_DIS_125CLK;
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
-
- /* activate energy detect mode 1 */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
-
- /* energy detect mode */
- if (Mode == PHY_PM_ENERGY_DETECT) {
- Word |= PHY_M_PC_EN_DET;
- }
- /* energy detect plus mode */
- else {
- Word |= PHY_M_PC_EN_DET_PLUS;
- }
-
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
-
- /*
- * reinitialize the PHY to force a software reset
- * which is necessary after the register settings
- * for the energy detect modes.
- * Furthermore reinitialisation prevents that the
- * PHY is running out of a stable state.
- */
- SkGmInitPhyMarv(pAC, IoC, Port, SK_FALSE);
- break;
-
- /* don't change current power mode */
- default:
- pAC->GIni.GP[Port].PPhyPowerState = LastMode;
- Ret = 1;
- break;
- }
- }
- /* low power modes are not supported by this chip */
- else {
- Ret = 1;
- }
-
- return(Ret);
-
-} /* SkGmEnterLowPowerMode */
-
-/******************************************************************************
- *
- * SkGmLeaveLowPowerMode()
- *
- * Description:
- * Leave the current low power mode and switch to normal mode
- *
- * Note:
- *
- * Returns:
- * 0: ok
- * 1: error
- */
-int SkGmLeaveLowPowerMode(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (e.g. MAC_1) */
-{
- SK_U32 DWord;
- SK_U16 Word;
- SK_U8 LastMode;
- int Ret = 0;
-
- if (pAC->GIni.GIYukonLite &&
- pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) {
-
- /* save current power mode */
- LastMode = pAC->GIni.GP[Port].PPhyPowerState;
- pAC->GIni.GP[Port].PPhyPowerState = PHY_PM_OPERATIONAL_MODE;
-
- switch (LastMode) {
- /* coma mode (deep sleep) */
- case PHY_PM_DEEP_SLEEP:
- SK_IN32(IoC, PCI_C(PCI_OUR_REG_1), &DWord);
-
- SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
-
- /* Release PHY from Coma Mode */
- SK_OUT32(IoC, PCI_C(PCI_OUR_REG_1), DWord & ~PCI_PHY_COMA);
-
- SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
-
- SK_IN32(IoC, B2_GP_IO, &DWord);
-
- /* set to output */
- DWord |= (GP_DIR_9 | GP_IO_9);
-
- /* set PHY reset */
- SK_OUT32(IoC, B2_GP_IO, DWord);
-
- DWord &= ~GP_IO_9; /* clear PHY reset (active high) */
-
- /* clear PHY reset */
- SK_OUT32(IoC, B2_GP_IO, DWord);
- break;
-
- /* IEEE 22.2.4.1.5 compatible power down mode */
- case PHY_PM_IEEE_POWER_DOWN:
- /*
- * - enable MAC 125 MHz clock
- * - set MAC power up
- */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
- Word &= ~PHY_M_PC_DIS_125CLK;
- Word |= PHY_M_PC_MAC_POW_UP;
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
-
- /*
- * register changes must be followed by a software
- * reset to take effect
- */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
- Word |= PHY_CT_RESET;
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
-
- /* switch IEEE compatible power down mode off */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
- Word &= ~PHY_CT_PDOWN;
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
- break;
-
- /* energy detect and energy detect plus mode */
- case PHY_PM_ENERGY_DETECT:
- case PHY_PM_ENERGY_DETECT_PLUS:
- /*
- * - enable MAC 125 MHz clock
- */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
- Word &= ~PHY_M_PC_DIS_125CLK;
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
-
- /* disable energy detect mode */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
- Word &= ~PHY_M_PC_EN_DET_MSK;
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
-
- /*
- * reinitialize the PHY to force a software reset
- * which is necessary after the register settings
- * for the energy detect modes.
- * Furthermore reinitialisation prevents that the
- * PHY is running out of a stable state.
- */
- SkGmInitPhyMarv(pAC, IoC, Port, SK_FALSE);
- break;
-
- /* don't change current power mode */
- default:
- pAC->GIni.GP[Port].PPhyPowerState = LastMode;
- Ret = 1;
- break;
- }
- }
- /* low power modes are not supported by this chip */
- else {
- Ret = 1;
- }
-
- return(Ret);
-
-} /* SkGmLeaveLowPowerMode */
-#endif /* !SK_SLIM */
-
-
/******************************************************************************
*
* SkGmInitPhyMarv() - Initialize the Marvell Phy registers
} /* SkMacAutoNegDone */
-#ifdef GENESIS
-/******************************************************************************
- *
- * SkXmSetRxTxEn() - Special Set Rx/Tx Enable and some features in XMAC
- *
- * Description:
- * sets MAC or PHY LoopBack and Duplex Mode in the MMU Command Reg.
- * enables Rx/Tx
- *
- * Returns: N/A
- */
-static void SkXmSetRxTxEn(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-int Para) /* Parameter to set: MAC or PHY LoopBack, Duplex Mode */
-{
- SK_U16 Word;
-
- XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
-
- switch (Para & (SK_MAC_LOOPB_ON | SK_MAC_LOOPB_OFF)) {
- case SK_MAC_LOOPB_ON:
- Word |= XM_MMU_MAC_LB;
- break;
- case SK_MAC_LOOPB_OFF:
- Word &= ~XM_MMU_MAC_LB;
- break;
- }
-
- switch (Para & (SK_PHY_LOOPB_ON | SK_PHY_LOOPB_OFF)) {
- case SK_PHY_LOOPB_ON:
- Word |= XM_MMU_GMII_LOOP;
- break;
- case SK_PHY_LOOPB_OFF:
- Word &= ~XM_MMU_GMII_LOOP;
- break;
- }
-
- switch (Para & (SK_PHY_FULLD_ON | SK_PHY_FULLD_OFF)) {
- case SK_PHY_FULLD_ON:
- Word |= XM_MMU_GMII_FD;
- break;
- case SK_PHY_FULLD_OFF:
- Word &= ~XM_MMU_GMII_FD;
- break;
- }
-
- XM_OUT16(IoC, Port, XM_MMU_CMD, Word | XM_MMU_ENA_RX | XM_MMU_ENA_TX);
-
- /* dummy read to ensure writing */
- XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
-
-} /* SkXmSetRxTxEn */
-#endif /* GENESIS */
-
-
-#ifdef YUKON
-/******************************************************************************
- *
- * SkGmSetRxTxEn() - Special Set Rx/Tx Enable and some features in GMAC
- *
- * Description:
- * sets MAC LoopBack and Duplex Mode in the General Purpose Control Reg.
- * enables Rx/Tx
- *
- * Returns: N/A
- */
-static void SkGmSetRxTxEn(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-int Para) /* Parameter to set: MAC LoopBack, Duplex Mode */
-{
- SK_U16 Ctrl;
-
- GM_IN16(IoC, Port, GM_GP_CTRL, &Ctrl);
-
- switch (Para & (SK_MAC_LOOPB_ON | SK_MAC_LOOPB_OFF)) {
- case SK_MAC_LOOPB_ON:
- Ctrl |= GM_GPCR_LOOP_ENA;
- break;
- case SK_MAC_LOOPB_OFF:
- Ctrl &= ~GM_GPCR_LOOP_ENA;
- break;
- }
-
- switch (Para & (SK_PHY_FULLD_ON | SK_PHY_FULLD_OFF)) {
- case SK_PHY_FULLD_ON:
- Ctrl |= GM_GPCR_DUP_FULL;
- break;
- case SK_PHY_FULLD_OFF:
- Ctrl &= ~GM_GPCR_DUP_FULL;
- break;
- }
-
- GM_OUT16(IoC, Port, GM_GP_CTRL, (SK_U16)(Ctrl | GM_GPCR_RX_ENA |
- GM_GPCR_TX_ENA));
-
- /* dummy read to ensure writing */
- GM_IN16(IoC, Port, GM_GP_CTRL, &Ctrl);
-
-} /* SkGmSetRxTxEn */
-#endif /* YUKON */
-
-
-#ifndef SK_SLIM
-/******************************************************************************
- *
- * SkMacSetRxTxEn() - Special Set Rx/Tx Enable and parameters
- *
- * Description: calls the Special Set Rx/Tx Enable routines dep. on board type
- *
- * Returns: N/A
- */
-void SkMacSetRxTxEn(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-int Para)
-{
-#ifdef GENESIS
- if (pAC->GIni.GIGenesis) {
-
- SkXmSetRxTxEn(pAC, IoC, Port, Para);
- }
-#endif /* GENESIS */
-
-#ifdef YUKON
- if (pAC->GIni.GIYukon) {
-
- SkGmSetRxTxEn(pAC, IoC, Port, Para);
- }
-#endif /* YUKON */
-
-} /* SkMacSetRxTxEn */
-#endif /* !SK_SLIM */
-
-
/******************************************************************************
*
* SkMacRxTxEnable() - Enable Rx/Tx activity if port is up
* Returns:
* nothing
*/
-void SkXmIrq(
+static void SkXmIrq(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
* Returns:
* nothing
*/
-void SkGmIrq(
+static void SkGmIrq(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
return 0;
}
+#ifdef CONFIG_PM
+static int starfire_suspend(struct pci_dev *pdev, pm_message_t state)
+{
+ struct net_device *dev = pci_get_drvdata(pdev);
+
+ if (netif_running(dev)) {
+ netif_device_detach(dev);
+ netdev_close(dev);
+ }
+
+ pci_save_state(pdev);
+ pci_set_power_state(pdev, pci_choose_state(pdev,state));
+
+ return 0;
+}
+
+static int starfire_resume(struct pci_dev *pdev)
+{
+ struct net_device *dev = pci_get_drvdata(pdev);
+
+ pci_set_power_state(pdev, PCI_D0);
+ pci_restore_state(pdev);
+
+ if (netif_running(dev)) {
+ netdev_open(dev);
+ netif_device_attach(dev);
+ }
+
+ return 0;
+}
+#endif /* CONFIG_PM */
+
static void __devexit starfire_remove_one (struct pci_dev *pdev)
{
.name = DRV_NAME,
.probe = starfire_init_one,
.remove = __devexit_p(starfire_remove_one),
+#ifdef CONFIG_PM
+ .suspend = starfire_suspend,
+ .resume = starfire_resume,
+#endif /* CONFIG_PM */
.id_table = starfire_pci_tbl,
};
#include <linux/spinlock.h>
#include <linux/version.h>
#include <linux/bitops.h>
+#include <linux/jiffies.h>
#include <net/checksum.h>
while (!((readw(streamer_mmio + SISR)) & SISR_SRB_REPLY)) {
msleep_interruptible(100);
- if (jiffies - t > 40 * HZ) {
+ if (time_after(jiffies, t + 40 * HZ)) {
printk(KERN_ERR
"IBM PCI tokenring card not responding\n");
release_region(dev->base_addr, STREAMER_IO_SPACE);
#include <linux/pci.h>
#include <linux/spinlock.h>
#include <linux/bitops.h>
+#include <linux/jiffies.h>
#include <net/checksum.h>
t=jiffies;
while((readl(olympic_mmio+BCTL)) & BCTL_SOFTRESET) {
schedule();
- if(jiffies-t > 40*HZ) {
+ if(time_after(jiffies, t + 40*HZ)) {
printk(KERN_ERR "IBM PCI tokenring card not responding.\n");
return -ENODEV;
}
t=jiffies;
while (!readl(olympic_mmio+CLKCTL) & CLKCTL_PAUSE) {
schedule() ;
- if(jiffies-t > 2*HZ) {
+ if(time_after(jiffies, t + 2*HZ)) {
printk(KERN_ERR "IBM Cardbus tokenring adapter not responsing.\n") ;
return -ENODEV;
}
t=jiffies;
while(!((readl(olympic_mmio+SISR_RR)) & SISR_SRB_REPLY)) {
schedule();
- if(jiffies-t > 15*HZ) {
+ if(time_after(jiffies, t + 15*HZ)) {
printk(KERN_ERR "IBM PCI tokenring card not responding.\n");
return -ENODEV;
}
olympic_priv->srb_queued=0;
break;
}
- if ((jiffies-t) > 10*HZ) {
+ if (time_after(jiffies, t + 10*HZ)) {
printk(KERN_WARNING "%s: SRB timed out. \n",dev->name) ;
olympic_priv->srb_queued=0;
break ;
#include <linux/kernel.h>
#include <linux/pci.h>
+#include <linux/jiffies.h>
#include "tulip.h"
*/
if (tulip_media_cap[dev->if_port] & MediaIsMII)
return;
- if (! tp->nwayset || jiffies - dev->trans_start > 1*HZ) {
+ if (! tp->nwayset || time_after(jiffies, dev->trans_start + 1*HZ)) {
tp->csr6 = 0x00420000 | (tp->csr6 & 0x0000fdff);
iowrite32(tp->csr6, ioaddr + CSR6);
iowrite32(0x30, ioaddr + CSR12);
#include <linux/ip.h>
#include <linux/tcp.h>
#include <linux/time.h>
-
+#include <linux/jiffies.h>
/************************************************************************/
/* Useful structures and definitions */
del_timer(&strip_info->idle_timer);
- if (jiffies - strip_info->pps_timer > HZ) {
+ if (time_after(jiffies, strip_info->pps_timer + HZ)) {
unsigned long t = jiffies - strip_info->pps_timer;
unsigned long rx_pps_count = (strip_info->rx_pps_count * HZ * 8 + t / 2) / t;
unsigned long tx_pps_count = (strip_info->tx_pps_count * HZ * 8 + t / 2) / t;
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/zorro.h>
+#include <linux/jiffies.h>
#include <asm/system.h>
#include <asm/irq.h>
z_writeb(z_readb(ioaddr + NE_RESET), ioaddr + NE_RESET);
while ((z_readb(ioaddr + NE_EN0_ISR) & ENISR_RESET) == 0)
- if (jiffies - reset_start_time > 2*HZ/100) {
+ if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
printk(KERN_WARNING " not found (no reset ack).\n");
return -ENODEV;
}
/* This check _should_not_ be necessary, omit eventually. */
while ((z_readb(NE_BASE+NE_EN0_ISR) & ENISR_RESET) == 0)
- if (jiffies - reset_start_time > 2*HZ/100) {
+ if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
printk(KERN_WARNING "%s: ne_reset_8390() did not complete.\n",
dev->name);
break;
dma_start = jiffies;
while ((z_readb(NE_BASE + NE_EN0_ISR) & ENISR_RDC) == 0)
- if (jiffies - dma_start > 2*HZ/100) { /* 20ms */
+ if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */
printk(KERN_ERR "%s: timeout waiting for Tx RDC.\n",
dev->name);
zorro8390_reset_8390(dev);
extern struct ArcProto *arc_proto_map[256], *arc_proto_default,
*arc_bcast_proto, *arc_raw_proto;
-extern struct ArcProto arc_proto_null;
/*
#define arcnet_dump_skb(dev,skb,desc) ;
#endif
-#if (ARCNET_DEBUG_MAX & D_RX) || (ARCNET_DEBUG_MAX & D_TX)
-void arcnet_dump_packet(struct net_device *dev, int bufnum, char *desc,
- int take_arcnet_lock);
-#else
-#define arcnet_dump_packet(dev, bufnum, desc,take_arcnet_lock) ;
-#endif
-
void arcnet_unregister_proto(struct ArcProto *proto);
irqreturn_t arcnet_interrupt(int irq, void *dev_id, struct pt_regs *regs);
struct net_device *alloc_arcdev(char *name);
-void arcnet_rx(struct net_device *dev, int bufnum);
#endif /* __KERNEL__ */
#endif /* _LINUX_ARCDEVICE_H */
projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / commitdiff