ARM: sun6i: Enable the I2C controllers

The A31 has 4 I2C controllers that are the same than the one in the
other Allwinner SoCs, except for the fact that they are asserted in
reset by the reset unit.

Add these i2c controllers to the DTSI.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 42f310a925c4eaac919b3ed4e063ede7150b1b7f..7c724d9fc60afa12f4b340e74702c07e8534f255 100644 (file)
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -359,6 +359,46 @@
                        status = "disabled";
                };
 
+               i2c0: i2c@01c2ac00 {
+                       compatible = "allwinner,sun6i-a31-i2c";
+                       reg = <0x01c2ac00 0x400>;
+                       interrupts = <0 6 4>;
+                       clocks = <&apb2_gates 0>;
+                       clock-frequency = <100000>;
+                       resets = <&apb2_rst 0>;
+                       status = "disabled";
+               };
+
+               i2c1: i2c@01c2b000 {
+                       compatible = "allwinner,sun6i-a31-i2c";
+                       reg = <0x01c2b000 0x400>;
+                       interrupts = <0 7 4>;
+                       clocks = <&apb2_gates 1>;
+                       clock-frequency = <100000>;
+                       resets = <&apb2_rst 1>;
+                       status = "disabled";
+               };
+
+               i2c2: i2c@01c2b400 {
+                       compatible = "allwinner,sun6i-a31-i2c";
+                       reg = <0x01c2b400 0x400>;
+                       interrupts = <0 8 4>;
+                       clocks = <&apb2_gates 2>;
+                       clock-frequency = <100000>;
+                       resets = <&apb2_rst 2>;
+                       status = "disabled";
+               };
+
+               i2c3: i2c@01c2b800 {
+                       compatible = "allwinner,sun6i-a31-i2c";
+                       reg = <0x01c2b800 0x400>;
+                       interrupts = <0 9 4>;
+                       clocks = <&apb2_gates 3>;
+                       clock-frequency = <100000>;
+                       resets = <&apb2_rst 3>;
+                       status = "disabled";
+               };
+
                spi0: spi@01c68000 {
                        compatible = "allwinner,sun6i-a31-spi";
                        reg = <0x01c68000 0x1000>;