config IOMMU_DEBUG
bool "Enable IOMMU debugging"
- depends on IOMMU && DEBUG_KERNEL
+ depends on GART_IOMMU && DEBUG_KERNEL
depends on X86_64
help
Force the IOMMU to on even when you have less than 4GB of
# Mark as embedded because too many people got it wrong.
# The code disables itself when not needed.
-config IOMMU
+config GART_IOMMU
bool "GART IOMMU support" if EMBEDDED
default y
select SWIOTLB
config K8_NB
def_bool y
- depends on AGP_AMD64 || IOMMU || (PCI && NUMA)
+ depends on AGP_AMD64 || GART_IOMMU || (PCI && NUMA)
endmenu
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_HPET_TIMER=y
CONFIG_HPET_EMULATE_RTC=y
-CONFIG_IOMMU=y
+CONFIG_GART_IOMMU=y
# CONFIG_CALGARY_IOMMU is not set
CONFIG_SWIOTLB=y
CONFIG_X86_MCE=y
obj-$(CONFIG_PM) += suspend_64.o
obj-$(CONFIG_HIBERNATION) += suspend_asm_64.o
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-obj-$(CONFIG_IOMMU) += pci-gart_64.o aperture_64.o
+obj-$(CONFIG_GART_IOMMU) += pci-gart_64.o aperture_64.o
obj-$(CONFIG_CALGARY_IOMMU) += pci-calgary_64.o tce_64.o
obj-$(CONFIG_SWIOTLB) += pci-swiotlb_64.o
obj-$(CONFIG_KPROBES) += kprobes_64.o
#include <asm/io_apic.h>
#include <asm/apic.h>
-#ifdef CONFIG_IOMMU
+#ifdef CONFIG_GART_IOMMU
#include <asm/gart.h>
#endif
static void __init via_bugs(void)
{
-#ifdef CONFIG_IOMMU
+#ifdef CONFIG_GART_IOMMU
if ((end_pfn > MAX_DMA32_PFN || force_iommu) &&
!iommu_aperture_allowed) {
printk(KERN_INFO
swiotlb = 1;
#endif
-#ifdef CONFIG_IOMMU
+#ifdef CONFIG_GART_IOMMU
gart_parse_options(p);
#endif
* The order of these functions is important for
* fall-back/fail-over reasons
*/
-#ifdef CONFIG_IOMMU
+#ifdef CONFIG_GART_IOMMU
iommu_hole_init();
#endif
intel_iommu_init();
-#ifdef CONFIG_IOMMU
+#ifdef CONFIG_GART_IOMMU
gart_iommu_init();
#endif
X on AMD Irongate, 761, and 762 chipsets.
config AGP_AMD64
- tristate "AMD Opteron/Athlon64 on-CPU GART support" if !IOMMU
+ tristate "AMD Opteron/Athlon64 on-CPU GART support" if !GART_IOMMU
depends on AGP && X86
- default y if IOMMU
+ default y if GART_IOMMU
help
This option gives you AGP support for the GLX component of
X using the on-CPU northbridge of the AMD Athlon64/Opteron CPUs.
/* On AMD64 the PCI driver needs to initialize this driver early
for the IOMMU, so it has to be called via a backdoor. */
-#ifndef CONFIG_IOMMU
+#ifndef CONFIG_GART_IOMMU
module_init(agp_amd64_init);
module_exit(agp_amd64_cleanup);
#endif
if (dma) {
io->urbs [i]->transfer_dma = sg_dma_address (sg + i);
len = sg_dma_len (sg + i);
-#if defined(CONFIG_HIGHMEM) || defined(CONFIG_IOMMU)
+#if defined(CONFIG_HIGHMEM) || defined(CONFIG_GART_IOMMU)
io->urbs[i]->transfer_buffer = NULL;
#else
io->urbs[i]->transfer_buffer = sg_virt(&sg[i]);
extern void no_iommu_init(void);
extern int force_iommu, no_iommu;
extern int iommu_detected;
-#ifdef CONFIG_IOMMU
+#ifdef CONFIG_GART_IOMMU
extern void gart_iommu_init(void);
extern void gart_iommu_shutdown(void);
extern void __init gart_parse_options(char *);
*/
#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
-#if defined(CONFIG_IOMMU) || defined(CONFIG_CALGARY_IOMMU)
+#if defined(CONFIG_GART_IOMMU) || defined(CONFIG_CALGARY_IOMMU)
#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
dma_addr_t ADDR_NAME;