ARM: davinci: cp_intc: Add OF support for TI interrupt controller
authorHeiko Schocher <hs@denx.de>
Wed, 30 May 2012 10:18:58 +0000 (12:18 +0200)
committerSekhar Nori <nsekhar@ti.com>
Thu, 5 Jul 2012 08:42:35 +0000 (14:12 +0530)
Add a function to initialize the Common Platform Interrupt Controller
(cp_intc) from TI used on OMAP-L1x SoCs using a device tree node.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: davinci-linux-open-source@linux.davincidsp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Documentation/devicetree/bindings/arm/davinci/cp-intc.txt [new file with mode: 0644]
arch/arm/mach-davinci/cp_intc.c
arch/arm/mach-davinci/include/mach/cp_intc.h

diff --git a/Documentation/devicetree/bindings/arm/davinci/cp-intc.txt b/Documentation/devicetree/bindings/arm/davinci/cp-intc.txt
new file mode 100644 (file)
index 0000000..597e8a0
--- /dev/null
@@ -0,0 +1,27 @@
+* TI Common Platform Interrupt Controller
+
+Common Platform Interrupt Controller (cp_intc) is used on
+OMAP-L1x SoCs and can support several configurable number
+of interrupts.
+
+Main node required properties:
+
+- compatible : should be:
+       "ti,cp-intc"
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+  interrupt source. The type shall be a <u32> and the value shall be 1.
+
+  The cell contains the interrupt number in the range [0-128].
+- ti,intc-size: Number of interrupts handled by the interrupt controller.
+- reg: physical base address and size of the intc registers map.
+
+Example:
+
+       intc: interrupt-controller@1 {
+               compatible = "ti,cp-intc";
+               interrupt-controller;
+               #interrupt-cells = <1>;
+               ti,intc-size = <101>;
+               reg = <0xfffee000 0x2000>;
+       };
index 45d52567ced7353ccdf87d92d3acd72698972f15..006dae8dfe443b3474ae6df73b5c97cf93502f33 100644 (file)
@@ -14,6 +14,9 @@
 #include <linux/irq.h>
 #include <linux/irqdomain.h>
 #include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
 
 #include <mach/common.h>
 #include <mach/cp_intc.h>
@@ -119,7 +122,7 @@ static const struct irq_domain_ops cp_intc_host_ops = {
        .xlate = irq_domain_xlate_onetwocell,
 };
 
-int __init __cp_intc_init(struct device_node *node)
+int __init cp_intc_of_init(struct device_node *node, struct device_node *parent)
 {
        u32 num_irq             = davinci_soc_info.intc_irq_num;
        u8 *irq_prio            = davinci_soc_info.intc_irq_prios;
@@ -128,7 +131,14 @@ int __init __cp_intc_init(struct device_node *node)
        int i, irq_base;
 
        davinci_intc_type = DAVINCI_INTC_TYPE_CP_INTC;
-       davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
+       if (node) {
+               davinci_intc_base = of_iomap(node, 0);
+               if (of_property_read_u32(node, "ti,intc-size", &num_irq))
+                       pr_warn("unable to get intc-size, default to %d\n",
+                               num_irq);
+       } else {
+               davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
+       }
        if (WARN_ON(!davinci_intc_base))
                return -EINVAL;
 
@@ -208,5 +218,5 @@ int __init __cp_intc_init(struct device_node *node)
 
 void __init cp_intc_init(void)
 {
-       __cp_intc_init(NULL);
+       cp_intc_of_init(NULL, NULL);
 }
index 4e8190eed673dca87281134821ab5fa06ac477f7..d13d8dfa2b0d6c6d871c80a5ebdbb19f237476b7 100644 (file)
@@ -52,5 +52,6 @@
 #define CP_INTC_VECTOR_ADDR(n)         (0x2000 + (n << 2))
 
 void __init cp_intc_init(void);
+int __init cp_intc_of_init(struct device_node *, struct device_node *);
 
 #endif /* __ASM_HARDWARE_CP_INTC_H */