ARM: debug: enable UART1 for socfpga Cyclone5

[ Upstream commit f6628486c8489e91c513b62608f89ccdb745600d ]

Cyclone5 and Arria10 doesn't have the same memory map for UART1.

Split the SOCFPGA_UART1 into 2 options to allow debugging on UART1 for Cyclone5.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index a5625430bef64a5c73e360b0b1d6d2aa332dc342..bb8f39fe3a225563124dbabff69459078095b10a 100644 (file)
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -987,14 +987,21 @@ choice
                  Say Y here if you want kernel low-level debugging support
                  on SOCFPGA(Cyclone 5 and Arria 5) based platforms.
 
-       config DEBUG_SOCFPGA_UART1
+       config DEBUG_SOCFPGA_ARRIA10_UART1
                depends on ARCH_SOCFPGA
-               bool "Use SOCFPGA UART1 for low-level debug"
+               bool "Use SOCFPGA Arria10 UART1 for low-level debug"
                select DEBUG_UART_8250
                help
                  Say Y here if you want kernel low-level debugging support
                  on SOCFPGA(Arria 10) based platforms.
 
+       config DEBUG_SOCFPGA_CYCLONE5_UART1
+               depends on ARCH_SOCFPGA
+               bool "Use SOCFPGA Cyclone 5 UART1 for low-level debug"
+               select DEBUG_UART_8250
+               help
+                 Say Y here if you want kernel low-level debugging support
+                 on SOCFPGA(Cyclone 5 and Arria 5) based platforms.
 
        config DEBUG_SUN9I_UART0
                bool "Kernel low-level debugging messages via sun9i UART0"
@@ -1534,7 +1541,8 @@ config DEBUG_UART_PHYS
        default 0xfe800000 if ARCH_IOP32X
        default 0xff690000 if DEBUG_RK32_UART2
        default 0xffc02000 if DEBUG_SOCFPGA_UART0
-       default 0xffc02100 if DEBUG_SOCFPGA_UART1
+       default 0xffc02100 if DEBUG_SOCFPGA_ARRIA10_UART1
+       default 0xffc03000 if DEBUG_SOCFPGA_CYCLONE5_UART1
        default 0xffd82340 if ARCH_IOP13XX
        default 0xffe40000 if DEBUG_RCAR_GEN1_SCIF0
        default 0xffe42000 if DEBUG_RCAR_GEN1_SCIF2
@@ -1624,7 +1632,8 @@ config DEBUG_UART_VIRT
        default 0xfeb30c00 if DEBUG_KEYSTONE_UART0
        default 0xfeb31000 if DEBUG_KEYSTONE_UART1
        default 0xfec02000 if DEBUG_SOCFPGA_UART0
-       default 0xfec02100 if DEBUG_SOCFPGA_UART1
+       default 0xfec02100 if DEBUG_SOCFPGA_ARRIA10_UART1
+       default 0xfec03000 if DEBUG_SOCFPGA_CYCLONE5_UART1
        default 0xfec12000 if (DEBUG_MVEBU_UART0 || DEBUG_MVEBU_UART0_ALTERNATE) && ARCH_MVEBU
        default 0xfec12100 if DEBUG_MVEBU_UART1_ALTERNATE
        default 0xfec10000 if DEBUG_SIRFATLAS7_UART0
@@ -1672,9 +1681,9 @@ config DEBUG_UART_8250_WORD
        depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
        depends on DEBUG_UART_8250_SHIFT >= 2
        default y if DEBUG_PICOXCELL_UART || \
-               DEBUG_SOCFPGA_UART0 || DEBUG_SOCFPGA_UART1 || \
-               DEBUG_KEYSTONE_UART0 || DEBUG_KEYSTONE_UART1 || \
-               DEBUG_ALPINE_UART0 || \
+               DEBUG_SOCFPGA_UART0 || DEBUG_SOCFPGA_ARRIA10_UART1 || \
+               DEBUG_SOCFPGA_CYCLONE5_UART1 || DEBUG_KEYSTONE_UART0 || \
+               DEBUG_KEYSTONE_UART1 || DEBUG_ALPINE_UART0 || \
                DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \
                DEBUG_DAVINCI_DA8XX_UART2 || \
                DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2