drm/i915/gvt: drop checks for early Skylake revisions

We no longer cater for pre-production revisions of Skylake.

Fixes: d4362225e8cb ("drm/i915/gvt: update misc ctl regs base on stepping info")
Cc: Ping Gao <ping.a.gao@intel.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: Zhi Wang <zhi.a.wang@intel.com>
Cc: <intel-gfx@lists.freedesktop.org>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 79ee8330b99ac2d7b7d6179f3598c2907a358a1f..522809710312c25767209656133651971dd6a01f 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -1279,14 +1279,12 @@ static int skl_misc_ctl_write(struct intel_vgpu *vgpu, unsigned int offset,
        case 0x4ddc:
                vgpu_vreg(vgpu, offset) = 0x8000003c;
                /* WaCompressedResourceSamplerPbeMediaNewHashMode:skl */
-               if (IS_SKL_REVID(dev_priv, SKL_REVID_C0, REVID_FOREVER))
-                       I915_WRITE(reg, vgpu_vreg(vgpu, offset));
+               I915_WRITE(reg, vgpu_vreg(vgpu, offset));
                break;
        case 0x42080:
                vgpu_vreg(vgpu, offset) = 0x8000;
                /* WaCompressedResourceDisplayNewHashMode:skl */
-               if (IS_SKL_REVID(dev_priv, SKL_REVID_E0, REVID_FOREVER))
-                       I915_WRITE(reg, vgpu_vreg(vgpu, offset));
+               I915_WRITE(reg, vgpu_vreg(vgpu, offset));
                break;
        default:
                return -EINVAL;