drm/amd/powerplay: implement get_clock_by_type for iceland.
authorRex Zhu <Rex.Zhu@amd.com>
Thu, 10 Nov 2016 06:07:34 +0000 (14:07 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 10 Nov 2016 19:04:27 +0000 (14:04 -0500)
iceland use pptable v0.

bugs:
https://bugzilla.kernel.org/show_bug.cgi?id=185681
https://bugs.freedesktop.org/show_bug.cgi?id=98357

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

index f41cddf2a16b8df63492f786f17c721c0ea79779..b0c929dd8beb380a1742acbfd0ff652a2af84ada 100644 (file)
@@ -4233,18 +4233,26 @@ static int smu7_get_sclks(struct pp_hwmgr *hwmgr, struct amd_pp_clocks *clocks)
 {
        struct phm_ppt_v1_information *table_info =
                        (struct phm_ppt_v1_information *)hwmgr->pptable;
-       struct phm_ppt_v1_clock_voltage_dependency_table *dep_sclk_table;
+       struct phm_ppt_v1_clock_voltage_dependency_table *dep_sclk_table = NULL;
+       struct phm_clock_voltage_dependency_table *sclk_table;
        int i;
 
-       if (table_info == NULL)
-               return -EINVAL;
-
-       dep_sclk_table = table_info->vdd_dep_on_sclk;
-
-       for (i = 0; i < dep_sclk_table->count; i++) {
-               clocks->clock[i] = dep_sclk_table->entries[i].clk;
-               clocks->count++;
+       if (hwmgr->pp_table_version == PP_TABLE_V1) {
+               if (table_info == NULL || table_info->vdd_dep_on_sclk == NULL)
+                       return -EINVAL;
+               dep_sclk_table = table_info->vdd_dep_on_sclk;
+               for (i = 0; i < dep_sclk_table->count; i++) {
+                       clocks->clock[i] = dep_sclk_table->entries[i].clk;
+                       clocks->count++;
+               }
+       } else if (hwmgr->pp_table_version == PP_TABLE_V0) {
+               sclk_table = hwmgr->dyn_state.vddc_dependency_on_sclk;
+               for (i = 0; i < sclk_table->count; i++) {
+                       clocks->clock[i] = sclk_table->entries[i].clk;
+                       clocks->count++;
+               }
        }
+
        return 0;
 }
 
@@ -4266,17 +4274,24 @@ static int smu7_get_mclks(struct pp_hwmgr *hwmgr, struct amd_pp_clocks *clocks)
                        (struct phm_ppt_v1_information *)hwmgr->pptable;
        struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table;
        int i;
+       struct phm_clock_voltage_dependency_table *mclk_table;
 
-       if (table_info == NULL)
-               return -EINVAL;
-
-       dep_mclk_table = table_info->vdd_dep_on_mclk;
-
-       for (i = 0; i < dep_mclk_table->count; i++) {
-               clocks->clock[i] = dep_mclk_table->entries[i].clk;
-               clocks->latency[i] = smu7_get_mem_latency(hwmgr,
+       if (hwmgr->pp_table_version == PP_TABLE_V1) {
+               if (table_info == NULL)
+                       return -EINVAL;
+               dep_mclk_table = table_info->vdd_dep_on_mclk;
+               for (i = 0; i < dep_mclk_table->count; i++) {
+                       clocks->clock[i] = dep_mclk_table->entries[i].clk;
+                       clocks->latency[i] = smu7_get_mem_latency(hwmgr,
                                                dep_mclk_table->entries[i].clk);
-               clocks->count++;
+                       clocks->count++;
+               }
+       } else if (hwmgr->pp_table_version == PP_TABLE_V0) {
+               mclk_table = hwmgr->dyn_state.vddc_dependency_on_mclk;
+               for (i = 0; i < mclk_table->count; i++) {
+                       clocks->clock[i] = mclk_table->entries[i].clk;
+                       clocks->count++;
+               }
        }
        return 0;
 }